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UPD754304GS Datasheet(PDF) 3 Page - NEC |
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UPD754304GS Datasheet(HTML) 3 Page - NEC |
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3 / 74 page ![]() µPD754302, 754304, 754302(A), 754304(A) 3 Functional Outline Parameter Function Instruction execution time • 0.95, 1.91, 3.81, 15.3 µs (@ 4.19 MHz with system clock) • 0.67, 1.33, 2.67, 10.7 µs (@ 6.0 MHz with system clock) On-chip memory ROM 2048 × 8 bits ( µPD754302) 4096 × 8 bits ( µPD754304) RAM 256 × 4 bits General-purpose register • 4-bit operation: 8 × 4 banks • 8-bit operation: 4 × 4 banks Input/ CMOS input 8 On-chip pull-up resistors can be specified by software: 7 output CMOS input/output 18 On-chip pull-up resistors can be specified by software: 18 port N-ch open-drain 4 13 V withstand voltage. On-chip pull-up resistors can be specified by input/output pins mask option. Total 30 Timer 3 channels • 8-bit timer/event counter: 2 channels (16-bit timer/event counter) • Basic interval timer/watchdog timer: 1 channel Serial interface • 3-wire serial I/O mode ... MSB or LSB can be selected for transferring top bit • 2-wire serial I/O mode Bit sequential buffer 16 bits Clock output (PCL) • Φ, 524, 262, 65.5 kHz (@ 4.19 MHz with system clock) • Φ, 750, 375, 93.8 kHz (@ 6.0 MHz with system clock) Vectored interrupts External: 3, Internal: 4 Test input External: 1 System clock oscillator Ceramic or crystal oscillator Standby function STOP/HALT mode Operating ambient TA = –40 to +85 ˚C temperature Power supply voltage VDD = 1.8 to 5.5 V Package 36-pin plastic shrink SOP (300 mil, 0.8-mm pitch) |
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