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UPD754304GS Datasheet(PDF) 39 Page - NEC |
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UPD754304GS Datasheet(HTML) 39 Page - NEC |
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39 / 74 page ![]() µPD754302, 754304, 754302(A), 754304(A) 39 (3) Explanation of symbols under addressing area column *1 MB = MBE•MBS (MBS = 0, 15) *2 MB = 0 *3 MBE = 0 : MB = 0 (000H-07FH) MB = 15 (F80H-FFFH) Data memory addressing MBE = 1 : MB = MBS (MBS = 0, 15) *4 MB = 15, fmem = FB0H-FBFH, FF0H-FFFH *5 MB = 15, pmem = FC0H-FFFH *6 µPD754302 addr = 0000H-07FFH µPD754304 addr = 0000H-0FFFH *7 addr = (Current PC) – 15 to (Current PC) – 1 (Current PC) + 2 to (Current PC) + 16 addr1 = (Current PC) – 15 to (Current PC) – 1 (Current PC) + 2 to (Current PC) + 16 *8 µPD754302 caddr = 0000H-07FFH Program memory addressing µPD754304 caddr = 0000H-0FFFH (PC12 = 0) *9 faddr = 0000H-07FFH *10 taddr = 0020H-007FH *11 µPD754302 addr1 = 0000H-07FFH µPD754304 addr1 = 0000H-0FFFH Remarks 1. MB indicates memory bank that can be accessed. 2. In *2, MB = 0 independently of how MBE and MBS are set. 3. In *4 and *5, MB = 15 independently of how MBE and MBS are set. 4. *6 to *11 indicate the areas that can be addressed. (4) Explanation of number of machine cycles column S denotes the number of machine cycles required by skip operation when a skip instruction is executed. The value of S varies as follows. • When no skip is made: S = 0 • When the skipped instruction is a 1- or 2-byte instruction: S = 1 • When the skipped instruction is a 3-byte instruction Note: S = 2 Note 3-byte instruction: BR !addr, BRA !addr1, CALL !addr or CALLA !addr1 instruction Caution The GETI instruction is skipped in one machine cycle. One machine cycle is equal to one cycle of CPU clock (= tCY); time can be selected from among four types by setting PCC. |
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