UPD754304GS datasheet(14/74 Pages) NEC

14 / 74 page

µPD754302, 754304, 754302(A), 754304(A)

4. SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE

4.1 Difference between Mk I and Mk II Modes

The CPU of

µPD754304 has the following two modes: Mk I and Mk II, either of which can be selected. The

mode can be switched by the bit 3 of the stack bank select register (SBS).

•

Mk I mode:

Can be used in the 75XL CPU with a ROM capacity of up to 16K bytes.

•

Mk II mode:

Can be used in all the 75XL CPU’s including those products whose ROM capacity is more

than 16K bytes.

Table 4-1. Differences between Mk I Mode and Mk II Mode

Mk I mode

Mk II mode

Number of stack bytes

2 bytes

3 bytes

for subroutine instructions

BRA !addr1 instruction

Not available

Available

CALLA !addr1 instruction

CALL !addr instruction

3 machine cycles

4 machine cycles

CALLF !faddr instruction

2 machine cycles

3 machine cycles

Caution

The Mk II mode supports a program area exceeding 16K bytes in the 75X and 75XL

series. This mode can improve software compatibility with products with a program

area of more than 16K bytes.

When Mk II mode is selected, the number of stack bytes when a subroutine call

instruction is executed is greater by 1 byte per stack compared with the Mk I mode.

When the CALL !addr or CALLF !faddr instruction is used, one more machine cycle is

required. To emphasize the efficiency of the RAM and processing speed rather than

software compatibility, therefore, use the Mk I mode.

UPD754304GS Datasheet(PDF) 14 Page - NEC