UPD754304GS datasheet(65/74 Pages) NEC

65 / 74 page

µPD754302, 754304, 754302(A), 754304(A)

APPENDIX A. COMPARISON OF FUNCTIONS AMONG

µPD750004, 754304, AND 75P4308

Item

µPD750004

µPD754304

µPD75P4308

Program memory

Mask ROM

One-time PROM

0000H-0FFFH

0000H-1FFFH

(4096

× 8 bits)

(4096

× 8 bits)

(8192

× 8 bits)

Data memory

000H-1FFH (512

× 4 bits)

000H-0FFH (256

× 4 bits)

CPU

75XL CPU

Instruction

w/main system clock

• 0.67, 1.33, 2.67, or 10.7

µs (at 6.0 MHz)

execution

• 0.95, 1.91, 3.81, or 15.3

µs (at 4.19 MHz)

time

w/subsystem clock

• 122

µs (at 32.768 kHz)

No subsystem clock

I/O port

CMOS input

8 (of which 7 can be connected with on-chip pull-up resistor via software)

CMOS I/O

18 (on-chip pull-up resistor can be connected via software)

N-ch open-drain I/O

8 (pull-up resistor can be

4 (pull-up resistor can be

4 (no mask option)

(withstand 13 V)

connected by mask option)

Total

30 (no port 4 pins)

Timer

4 channels

3 channels

• Basic interval timer/

• Basic interval timer/watchdog timer

watchdog timer

• 8-bit timer/event counter 0 (fX/22 added)

• 8-bit timer/event counter

• 8-bit timer/event counter 1 (TI1, fX/22 added)

• 8-bit timer

(can be used as 16-bit timer/event counter)

• Watch timer

Clock output (PCL)

•

Φ, 524, 262, or 65.5 kHz

(main system clock: 4.19 MHz)

•

Φ, 750, 375, or 93.8 kHz

(main system clock: 6.0 MHz)

BUZ output

Provided

None

Serial interface

3 modes are supported

2 modes are supported

• 3-wire serial I/O mode

• 3-wire serial I/O mode ··· MSB/LSB first selectable

··· MSB/LSB first

• 2-wire serial I/O mode

selectable

• 2-wire serial I/O mode

• SBI mode

Watch mode register (WM)

Provided

None

System clock control register

(SCC)

Suboscillation circuit control

MBS register

MB0, 1

MB0 only

Stack area (SBS1, 0)

UPD754304GS Datasheet(PDF) 65 Page - NEC

UPD754304GS Datasheet(HTML) 65 Page - NEC

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