UPD78014 datasheet(32/62 Pages) NEC

32 / 62 page

µPD78001B(A), 78002B(A)

Subsystem Clock Oscillation Circuit Characteristics (TA = –40 to +85

°C, VDD = 2.7 to 6.0 V)

Unit

kHz

µs

MAX.

100

Test Conditions

VDD = 4.5 to 6.0 V

Parameter

Oscillator

frequency (fXT)

Oscillation

stabilization time *2

XT1 input

frequency (fXT)

XT1 input

high/low level width

(tXTH , tXTL)

Resonator

Crystal

resonator

External

clock

Recommended

Circuit

XT1

XT2

XT1

XT2

VSS

MIN.

TYP.

32.768

1.2

*1. Indicates only oscillation circuit characteristics. Refer to “AC Characteristics” for instruction execution time.

2. Time required to stabilize oscillation after VDD reaches oscillator voltage MIN.

Cautions

When using the subsystem clock oscillator, wiring in the area enclosed with the broken line should be carried

out as follows to avoid an adverse effect from wiring capacitance.

•

Wiring should be as short as possible.

•

Wiring should not cross other signal lines.

•

Wiring should not be placed close to a varying high current.

•

The potential of the oscillator capacitor ground should be the same as VSS.

•

Do not ground wiring to a ground pattern in which a high current flows.

•

Do not fetch a signal from the oscillator.

The subsystem clock oscillation circuit is a circuit with a low amplification level, more prone to misoperation

due to noise than the main system clock. When using the subsystem clock, special care is needed regarding

the wiring method.

UPD78014 Datasheet(PDF) 32 Page - NEC

UPD78014 Datasheet(HTML) 32 Page - NEC

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