UPD78014 datasheet(12/62 Pages) NEC

12 / 62 page

µPD78001B(A), 78002B(A)

INTP0

Input

Effective edge (rising edge, falling edge, or both rising edge and falling edge)

Input

P00

INTP1

can be specified.

P01

INTP2

External interrupt input.

P02

INTP3

Falling edge detection external interrupt input.

P03

SI0

Input

Serial interface serial data input.

Input

P25/SB0

SO0

Output

Serial interface serial data output.

Input

P26/SB1

SB0

Input

Serial interface serial data input/output.

Input

P25/SI0

SB1

/output

P26/SO0

SCK0

Input

Serial interface serial clock input/output.

Input

P27

/output

TI1

Input

External count clock input to 8-bit timer (TM1).

Input

P33

TI2

External count clock input to 8-bit timer (TM2).

P34

TO1

Output

8-bit timer (TM1) output.

Input

P31

TO2

8-bit timer (TM2) output.

P32

PCL

Output

Clock output (for main system clock, subsystem clock trimming).

Input

P35

BUZ

Output

Buzzer output.

Input

P36

AD0 to AD7

Input

Low-order address/data bus at external memory expansion.

Input

P40 to P47

/output

A8 to A15

Output

High-order address bus at external memory expansion.

Input

P50 to P57

Output

External memory read operation strobe signal output.

Input

P64

External memory write operation strobe signal output.

P65

WAIT

Input

Wait insertion at external memory access.

Input

P66

ASTB

Output

Strobe output which latches the address information output at port 4 and

Input

P67

port 5 to access external memory.

RESET

Input

System reset input.

—

Input

Main system clock oscillation crystal connection.

—

XT1

Input

Subsystem clock oscillation crystal connection.

Input

P04

XT2

—

VDD

—

Positive power supply.

—

VSS

—

Ground potential.

—

IC0 to IC3

—

Internal connection. IC0/IC1/IC3 and IC2 should be connected directly to VSS

——

VDD, respecitively.

After

Reset

Dual-

Function Pin

3.2

OTHER PINS

Function

Pin Name

I/O

UPD78014 Datasheet(PDF) 12 Page - NEC

UPD78014 Datasheet(HTML) 12 Page - NEC

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