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UPD78014 Datasheet(PDF) 39 Page - NEC

Part # UPD78014
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  62 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD78014 Datasheet(HTML) 39 Page - NEC

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µPD78001B(A), 78002B(A)
39
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK cycle time
tKCY3
VDD = 4.5 to 6.0 V
800
ns
3200
ns
SCK high/low-level width
tKH3
VDD = 4.5 to 6.0 V
tKCY3/2-50
ns
tKL3
tKCY3/2-150
ns
SB0, SB1 setup time
tSIK3
VDD = 4.5 to 6.0 V
100
ns
(to SCK
↑)
300
ns
SB0, SB1 hold time
tKSI3
tKCY3/2
ns
from SCK
↓
SB0, SB1 output delay time
tKSO3
R = 1 k
Ω ,
VDD = 4.5 to 6.0 V
0
250
ns
(from SCK
↑)
C = 100 pF*
0
1000
ns
SB0, SB1
↓ from SCK↑
tKSB
tKCY3
ns
SCK
↓ from SB0, SB1↓
tSBK
tKCY3
ns
SB0, SB1 high-level width
tSBH
tKCY3
ns
SB0, SB1 low-level width
tSBL
tKCY3
ns
(c) SBI mode (SCK... Internal clock output)
*
R and C are the load resistors and load capacitance of the SB0 and SB1 output line.
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK cycle time
tKCY4
VDD = 4.5 to 6.0 V
800
ns
3200
ns
SCK high/low-level width
tKH4
VDD = 4.5 to 6.0 V
400
ns
tKL4
1600
ns
SB0, SB1 setup time
tSIK4
VDD = 4.5 to 6.0 V
100
ns
(to SCK
↑)
300
ns
SB0, SB1 hold time
tKSI4
tKCY4/2ns
(from SCK
↓)
SB0, SB1 output delay time
tKSO4
R = 1 k
Ω ,
VDD = 4.5 to 6.0 V
0
300
ns
from SCK
↑
C = 100 pF*
0
1000
ns
SB0, SB1
↓ from SCK↑
tKSB
tKCY4
ns
SCK
↓ from SB0, SB1↓
tSBK
tKCY4
ns
SB0, SB1 high-level width
tSBH
tKCY4
ns
SB0, SB1 low-level width
tSBL
tKCY4
ns
SCK rise, fall time
When external device expansion
160
ns
function is used
When external device expansion
1000
ns
function is not used
(d) SBI mode (SCK... External clock input)
*
R and C are the load resistors and load capacitance of the SB0 and SB1 output line.
tR4
tF4



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