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SM8212 Datasheet(PDF) 11 Page - Nippon Precision Circuits Inc

Part # SM8212
Description  POCSAG Decoder For Multiframe Pagers
PDF  32 Pages
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Manufacturer  NPC [Nippon Precision Circuits Inc]
Direct Link  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

SM8212 Datasheet(HTML) 11 Page - Nippon Precision Circuits Inc

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NIPPON PRECISION CIRCUITS-11
SM8212B
3. Operating Modes
(1) Power-ON mode
After power is applied, the internal registers should be
reset using RSTN.
When ATTN goes HIGH, the decoder sends a write
request for a decoder set read command and then waits for
the microcontroller (decoder set write command timing
starts approximately 50 ms after reset, but for safety, wait
minimum 900ms when Power-ON mode). The internal
operation in write mode takes place at the same timing as
for 1200 bps speed mode.
Write data is prepared in 32-bit batches of 1 parameter
batch and 8 address data batches for a total of 9 batches.
The parameter and address set commands are processed
in sync with the decoder internal clock (1200 Hz). As a
consequence, a gap of 28.4 ms minimum should be left
between batches to provide time for processing.
Alternatively, data can be written by first using the decoder
set read command to confirm whether or not processing is
still in progress (BUSY) before writing each batch. If the
time gap is 28.4 ms or greater, confirmation (READY) is
not required.
After parameters and all addresses have been written and
after decoder processing, the decoder set start command
transfers operation from write mode and starts preamble
mode operation.
When setting parameters and addresses in write mode,
the SCK clock frequency should not be less than 1200 Hz.
If this occurs, the SCK counter is reinitialized. This func-
tion, however, does make restoring operation easy even if
this or another clock is accidentally input.
In write mode, after power is applied and after reset ini-
tialization, all 9 batches (1 parameter and 8 address batch-
es) should be set. If not all batches are set, subsequent
operation may become unstable.
BUSY
RSTN
SCK
SDI
SDO
BUSY
WRITE MODE
PREAMBLE MODE
: 8-bit unit time data
: 8-bit unit time clock
: 8-bit unit time indeterminate data
DA T
A
DA T
A
READ
READY
START
READ
DA T
A
: 32-bit unit time parameter/address data
READY
READ
Figure 4. Power-ON (WRITE) mode timing
Refer to the AC Characteristics section for detailed timing specifications.
max.
28.4ms
1 ms min
max 900ms
129ms max
129ms max
max.
1.67ms
The SM8212B has four operating modes: Power-ON
(Write), Preamble, Idle and Lock modes.



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