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SM8212 Datasheet(PDF) 22 Page - Nippon Precision Circuits Inc |
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SM8212 Datasheet(HTML) 22 Page - Nippon Precision Circuits Inc |
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22 / 32 page ![]() NIPPON PRECISION CIRCUITS-22 SM8212B 3. Address set flags Address setting flag 10 21 31 40 50 60 70 8 ADDRESS ENABLE 9 ADDRESS 2 (ADDR 2) 10 ADDRESS 1 (ADDR 1) 11 ADDRESS 0 (ADDR 0) 12 FRAME 2 (FR 2) 13 FRAME 1 (FR 1) 14 FRAME 0 (FR 0) 15 A1 16 A2 17 A3 18 A4 19 A5 20 A6 21 A7 22 A8 23 A9 24 A9 25 A11 26 A12 27 A13 28 A14 29 A15 30 A16 31 A17 32 A18 Table 6. Address set flags Bits 1 to 7 These bits form the address set command. Bit 8 These bits are the address (bits 9 to 32) enable flags. When 1, the address set by bits 9 to 32 are valid. When 0, the address set by bits 9 to 32 are invalid. Bits 9 to 11 These bits are the address (bits 15 to 32) call sign set flags. Using 8-address control, the call signs are A, B, C, D, E, F, G and H. When an address code word is received, it is compared with the self addresses. Bits 12 to 14 These bits are the address (bits 15 to 32) frame assign flags. Any frame can be assigned individually to any of the 8 controllable addresses. Up to 8 frames can be assigned. Bits 15 to 32 Address bits. The 18-bit address should be written with MSB first. In the SM8212B, each of the 8 independent addresses can be assigned a frame. Address settings are made in 8 batches in write mode immediately after power is applied and immediately after reset (9 batches total, including the parameter batch). All batches should be set. If not all batches are set, subsequent operation may become unstable. Also, an address setting can be modified during normal operation, 1 address at a time, with no adverse effects. Note : Please refrain from turning "ON" the same num- ber of address for two or more at the same time when set- ting addresses. ADDR 2 ADDR 1 ADDR 0 Name ADDR 2 ADDR 1 ADDR 0 Name 000 A 100 E 001 B 101 F 010 C 110 G 011 D 111 H FR 2 FR 1 FR 0 Frame FR 2 FR 1 FR 0 Frame 0 0 0 Frame 0 1 0 0 Frame 4 0 0 1 Frame 1 1 0 1 Frame 5 0 1 0 Frame 2 1 1 0 Frame 6 0 1 1 Frame 3 1 1 1 Frame 7 |
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