SM8212 datasheet(16/32 Pages) NPC

16 / 32 page

NIPPON PRECISION CIRCUITS-16

SM8212B

In the SM8212B, the Break, Back-up, Write, BS-test,

Start and End auxiliary modes are controlled control sig-

nals from the CPU. These modes are set by data written on

SDI in sync with the SCK clock (see “Data/Flags” section).

When sending data from the decoder to the microcon-

troller, the SCK clock frequency should not be less than

1200 Hz. If this occurs, the SCK counter is reinitialized.

This function, however, does make restoring operation

easy even if this or another clock is accidentally input.

Note that read mode function is described in the

“Decoder Internal Status Transfer” section.

6. Decoder Set Command Transfer (CPU to SM8212B)

(1) Break

(2) Back-up (Power save control)

(3) Write

This is the interrupt command to stop reception and data

transfer. When the Break command is detected, the

received code word ends and reception stops, then the

device waits for self frame address detection or sync code

detection timing. Reception may continue for up to 32-bit

unit time after the Break command is received (or 34-bit

time after the Break command is sent).

Even though message reception may continue for a short

time when the Break command is sent, sync code detection

does not take place and accordingly the received data may

be deemed to have many errors.

Also, when CPU BREAK input interrupt end-of-message

method only is selected, message reception continues even

if an address code or an idle code is present, as long as the

Break command is not issued.

The time required from when the Break command is

issued until received data is output can be approximately 2

to 3 code words at internal sync speed. During this inter-

val, 32 clock cycles are sent to the decoder while ATTN is

LOW, and processing should be performed just as for nor-

mal operation. If no processing is performed, subsequent

operation may become unstable.

This is the decoder OFF mode command. This com-

mand stops all internal operation except the oscillator, and

thus is used to control current consumption. CLKO out-

put is stopped. Note that in back-up mode, the input/out-

put pins do not become high impedance.

Back-up mode is released and operation restarts when the

decoder set start command is issued. All parameter and

address information is retained during back-up, so opera-

tion starts directly from preamble mode.

Note that only the decoder set start command is accepted

during back-up mode.

Note that issuing the BACK-UP command is prohibited

in the WRITE mode.

This is the parameter and address write command. This

operation mode can also be used to modify parameters and

addresses. Write mode can be activated from BS-test mode,

and also approximately 50 ms after reset, but for safety,

wait minimum 900ms when Power-ON reset.

Parameters and addresses can be changed by first issuing a

decoder set command to enter write mode and then writ-

ing new parameters and addresses.

Note that in write mode, all internal operation takes place

with the same timing as for 1200 bps speed mode. BS1,

BS2 andBS3 are keep LOW.

Each of the addresses can be turned ON/OFF, according

to flag settings in the data written. Using this feature for a

specific address in a pager allows the service provider, by

prior agreement, to prohibit improper use of the pager

delivery service (excluding delivery testing, stopping sub-

sidiary services and similar functions).

In the SM8212B, data writes from the microcontroller

have priority, even if a received information transmit ready

signal (ATTN = LOW) is present (forced write).

When reception from the decoder RF stage has priority,

operation switches to write mode after the end-of-message

is confirmed by monitoring the internal operation using

the read command. Then the parameter set commands and

address set commands are written.

After writing, write mode is released using the decoder set

start command, and operation starts from preamble mode.

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