SM8580 datasheet(17/23 Pages) NPC

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SM8580AM

NIPPON PRECISION CIRCUITS—17

Timer counter set registers (registers 4 to 7)

Registers 4 and 5 set an 8-bit presettable binary

down-counter value for the timer interrupt func-

tion.

The value of the count can be determined by read-

ing the values of registers 6 and 7 during the

count.

The presettable binary down-counter is updated

when the data is written to registers 4 and 5.

The data written to registers 4 and 5 are stored and

are not changed until replacement data is written.

This allows these bits to function as RAM bits if the

timer interrupt mode is not used (when TIE = 0).

When TE is set to 1, periodic interrupts are not

output on TIRQN, even if registers 4 and 5 are set

to zero.

The timer error once a timer operation is started is

a maximum of one cycle of the source clock.

Timer operations started and stopped in less than

one cycle of the source clock are not counted.

Timer interrupt function example

Example of an hourly periodic timer interrupt

The timer start timing is set up in write mode when

the WRN rising edge corresponding to the TE bit

occurs, as shown in the following timing diagram.

Bank

A d dress

Bit 3

Bit 2

Bit 1

Bit 0

Timer counter set registers

8421

128

Timer counter output registers

8421

128

Bank

A d dress

Bit 3

Bit 2

Bit 1

Bit 0

Timer counter set registers

1100

0011

Timer set register

T E

Timer control

TEST

TEMP

T F

TIRQN pin

Address 8

Count down start

Timer

D3 pin

WRN pin

Finish

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