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ADS5474IPFPR Datasheet(PDF) 16 Page - Texas Instruments |
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ADS5474IPFPR Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 41 page ![]() ClockCommonMode V - 75 70 65 50 0 1 5 2 3 4 60 55 f =400MSPS V =3V S CLK PP 230MHz 351MHz 70MHz 10MHz ClockDutyCycle % - 90 85 70 65 60 55 50 20 30 40 50 80 60 70 80 75 f =400MSPS ClockInput=3V S PP f =10MHz IN f =70MHz IN f =230MHz IN f =300MHz IN Time s m - 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 0 10 20 30 40 50 60 70 80 90 100 Wakefrom5VSupply WakefromPDWN ClockCommonMode V - 90 85 80 75 70 65 50 0 1 5 2 3 4 60 55 f =400MSPS V =3V S CLK PP 230MHz 351MHz 70MHz 10MHz DVDD3 SupplyVoltage V - - 71.0 70.5 70.0 69.5 69.0 68.5 68.0 3.0 3.1 3.2 3.3 3.6 3.4 3.5 f =400MSPS f =230MHz S IN - ° 40 C +100 C ° 0 C ° +40 C ° +65 C ° +85 C ° +25 C ° Frequency Hz - 0 -10 -20 -30 -40 -50 -60 -70 -130 100k 1M 10M 100M 1G 10G -80 -90 -100 -110 -120 400MSPS 300MSPS ADS5474 SLAS525C – JULY 2007 – REVISED JANUARY 2016 www.ti.com Typical Characteristics (continued) At TA = 25°C, sampling rate = 400 MSPS, 50% clock duty cycle, 3-VPP differential sinusoidal clock, analog input amplitude = –1 dBFS, AVDD5 = 5 V, AVDD3 = 3.3 V, and DVDD3 = 3.3 V, unless otherwise noted. Figure 26. SNR vs DVDD3 Over Temperature Figure 27. CMRR vs Common-Mode Input Frequency Figure 28. ADC Wakeup Time Figure 29. SFDR vs Clock Common Mode Figure 30. SNR vs Clock Common Mode Figure 31. SFDR vs Clock Duty Cycle 16 Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated Product Folder Links: ADS5474 |
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