2

2

20

20

20 log (10

)

(10

)

ADC

AMP Filter

SNR

SNR

System

SNR

+

-

-

= -

´

+

2

2

,

.

_

_

(

)

(

)

Jitter

Jitter Ext CLock

Input

Aperture

ADC

T

T

T

=

+

ADS5474

SLAS525C – JULY 2007 – REVISED JANUARY 2016

www.ti.com

Typical Applications (continued)

The clock jitter in Equation 3 is the total amount of clock jitter, whether the jitter source is internal to the ADC

aperture jitter (103 fs for ADS5474) which is set by the noise of the clock input buffer, and the external clock jitter

from the clocking source and all associated buffering of the clock signal. Total clock jitter can be calculated from

the aperture jitter and the external clock jitter as in Equation 4.

(4)

External clock jitter can be minimized by using high quality clock sources and jitter cleaners as well as bandpass

filters at the clock input while a faster clock slew rate may at times also improve the ADC aperture jitter slightly.

The ADS5474 has an internal aperture jitter of 103 fs, which is largely fixed. The SNR depending on the amount

of external jitter for different input frequencies is shown in Figure 45. Often the design requirements will list a

target SNR for a system, and Equation 1 through Equation 3 are then used to calculate the external clock jitter

needed from the clocking solution to meet the system objectives.

Figure 45 shows that with an external clock jitter of 100 fs rms, the expected SNR of the ADS5474 would be

greater than 69 dBFS at an input tone of 200 MHz, which is the Nyquist limit. Having less external clock jitter

such as 35 fs rms or even 50 fs rms would result in an SNR that would exceed our design target, but at possibly

the expense of a more costly clocking solution. Having external clock jitter of 150 fs rms or more would fail to

meet the design target.

8.2.2.2 Amplifier Selection

The amplifier and any input filtering will have its own SNR performance, and the SNR performance of the

amplifier front end will combine with the SNR of the ADC itself to yield a system SNR that is less than that of the

ADC itself. System SNR can be calculated from the SNR of the amplifier conditioning circuit and the overall ADC

SNR as in Equation 5. In Equation 5, the SNR of the ADC would be the value derived from the datasheet

specifications and the clocking derivation presented in the previous section.

(5)

The signal-to-noise ratio (SNR) of the amplifier and filter can be calculated from the noise specifications in the

datasheet for the amplifier, the amplitude of the signal, and the bandwidth of the filter. The noise from the

amplifier is band-limited by the filter and the rolloff of the filter will depend on the order of the filter, therefore the

user should replace the filter rolloff with an equivalent brick-wall filter bandwidth. For example, a first order filter

may be approximated by a brick-wall filter with bandwidth of 1.57 times the bandwidth of the first order filter. We

will assume a first order filter for this design. The amplifier and filter noise can be calculated using Equation 6:

26

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