ADS5474IPFPR datasheet(5/41 Pages) TI1

5 / 41 page

ADS5474

www.ti.com

SLAS525C – JULY 2007 – REVISED JANUARY 2016

Pin Functions (continued)

DESCRIPTION

NAME

NO.

TYPE

LVDS digital output pairs

D10

D11

D12

D13

LVDS digital output pair, most significant bit (MSB)

D13

DRY

Data ready LVDS output pair

DRY

No connection (pins 4 and 5 should be left floating)

No connection (pins 43 to 46 are possible future bit additions for this pinout and therefore can

be connected to a digital bus or left floating)

OVR

Overrange indicator LVDS output. A logic high signals an analog input in excess of the full-

scale range.

OVR

Common-mode voltage output (3.1 V nominal). Commonly used in DC-coupled applications

to set the input signal to the correct common-mode voltage. A 0.1-

μF capacitor from VCM to

VCM

AGND is recommended, but not required.

(This pin is not used on the ADS5440, ADS5444, and ADS5463)

Power-down (active high). Device is in sleep mode when PWD pin is logic HIGH. ADC

PWD

converter is awake when PWD is logic LOW (grounded).

(This pin is not used on the ADS5440, ADS5444, and ADS5463)

Reference voltage input/output (2.4 V nominal). A 0.1-

μF capacitor from VREF to AGND is

VREF

recommended, but not required.

(not

(Power Pad)

Power Pad for thermal relief, also Analog Ground

numbered)

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