ADS5474

SLAS525C – JULY 2007 – REVISED JANUARY 2016

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Electrical Characteristics (continued)

sampling rate = 400 MSPS, 50% clock duty cycle, AVDD5 = 5 V, AVDD3 = 3.3 V, DVDD3 = 3.3 V, –1 dBFS differential input,

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RMS idle-channel noise

Inputs tied to common-mode

1.8

LSB

DIGITAL OUTPUTS

Differential output voltage (±)

247

350

454

mV

Common-mode output voltage

1.125

1.375

V

DIGITAL INPUTS

High level input voltage

PWD (pin 33)

2

V

Low level input voltage

PWD (pin 33)

0.8

V

High level input current

PWD (pin 33)

1

μA

Low level input current

PWD (pin 33)

–1

μA

Input capacitance

PWD (pin 33)

2

pF

6.6 Timing Characteristics

clock, unless otherwise noted.

(1)

TEST CONDITIONS

MIN

NOM

MAX

UNIT

Aperture delay

200

ps

Aperture jitter, rms

Internal jitter of the ADC

103

fs

Latency

3.5

cycles

Clock period

2.5

50

ns

Clock pulse duration, high

1

ns

Clock pulse duration, low

1

ns

Zero crossing, 10-pF parasitic loading to GND on each

1000

1400

1800

ps

output pin

Zero crossing, 10-pF parasitic loading to GND on each

800

1400

2000

ps

output pin

DATA to DRY skew

–500

0

500

ps

pin

DRY/DATA/OVR rise time

10-pF parasitic loading to GND on each output pin

500

ps

DRY/DATA/OVR fall time

10-pF parasitic loading to GND on each output pin

500

ps

(1)

Timing parameters are ensured by design or characterization, but not production tested.

(2)

delay.

10

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