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VS6955CA Datasheet(PDF) 47 Page - STMicroelectronics |
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VS6955CA Datasheet(HTML) 47 Page - STMicroelectronics |
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47 / 90 page ![]() DocID028071 Rev 2 47/90 VS6955CA Camera control interface (CCI) 48 4.2.24 Binning capability registers [0x1700 to 0x1714] Table 32. Binning capability registers [0x1700 to 0x1714] Index Byte Register name Data type Default Type Comment 1700 Hi min_frame_length_lines_ bin 16UI 00 RO Minimum frame length (lines) allowed in binning mode. 1701 Lo D9 1702 Hi max_frame_length_lines_ bin 16UI FF RO Maximum possible number of lines per frame in binning mode. 1703 Lo FF 1704 Hi min_line_length_pck_bin 16UI 0A RO Minimum line length (pixel clocks) allowed in binning mode. 1705 Lo BE 1706 Hi max_line_length_pck_bin 16UI 3F RO Maximum possible number of pixel clocks per line in binning mode. 1707 Lo FF 1708 Hi min_line_blanking_pck_ bin 16UI 00 RO Minimum line blanking time in pixel clocks in binning mode. 1709 Lo 86 170A Hi fine_integration_time_ min_bin 16UI 02 RO Minimum fine integration time allowed in binning mode (in pixels). 170B Lo 51 170C Hi fine_integration_time_ max_margin_bin 16UI 09 RO Margin used to determine the maximum fine integration time allowed in binning mode (in pixels). 170D Lo D8 1710 binning_capability 8UI 01 RO Binning supported 1711 binning_weighting_ capability 8UI 01 RO Binning weighting capability: Averaged weighting supported 1712 binning_sub_types 8UI 02 RO Number of binning subtypes available. 1713 binning_type_1 8UI 22 RO Binning type is 2 x 2 (Col x Row). 1714 binning_type_2 8UI 44 RO Binning type is 4 x 4 (Col x Row). |
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