DP83266 datasheet(46/152 Pages) NSC

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70 Control Information (Continued)

TABLE 7-3 MAC Control Information Address Space

Address

Description

Read

Write

Range

Conditions

000 – 007

Operation Registers

Always (Note 2)

008 – 02F

Event Registers

Always (Note 2)

Always (cond) (Note 2)

030 – 03F

Reserved

NA (Note 4)

040 – 07F

MAC Parameters

Stop Mode

(Notes 1 3)

080-0BF

CountersTimers

Always

Stop Mode (Note 1)

0C0-0FF

Reserved

NA (Note 4)

Note 1

An attempt to access a currently inaccessible MAC Control location because of the current

mode or because it is a reserved address space will cause a command error (bit CCE of the

Exception Status Register is set to One)

Note 2

Read and write accesses to reserved locations within the Operation and Event Address

ranges of the MAC Control Information Space cause a command error (bit CCE of the Exception

Status Register is set to One)

Note 3

The MAC Parameter RAM is also accessible when conditions a b and c are true Other-

wise accesses will cause a command error (bit CCE of the Exception Status Register is set to One)

and the access will not be performed

a) The MAC Transmitter is in state T0 or T1 or T3

b) OptionITC e 1 and OptionIRR e 1

c) FunctionBCN e 0 and FunctionCLM e 0

Note 4

Reserved bits in registers are always read as 0 and are not writable

TABLE 7-4 MAC Operation Registers

Addr

Name

Read

Write

000

MCMR0

DIAG

ILB

RES

PIP

MRP

CBP

RUN

Always

001

Option

ITC

EMIND

IFCS

IRPT

IRR

ITR

ELA

ESA

Always

002

Function

RES

CLM

BCN

MCRST

RES

MARST

Always

003 – 004

Reserved

RES

005

MCMR2

RES

AFIE

LLC MCE

SMT MCE

RES

BOSEL

Always

006

Reserved

RES

007

MCRev

REV(7 – 0)

Always

Ignored

Note 1

Attempts to access reserved locations within the MAC Operation Registers will result in Command Rejects (ESRCCE set to ONE)

Note 2

On Master Reset all MAC Operation Registers are set to Zero except the Revision Register

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