ADF7020BCP datasheet(22/40 Pages) AD

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ADF7020

Preliminary Technical Data

Rev. PrH | Page 22 of 40

accurate electrical model for the PC board. In this context, the

use of a suitable CAD package is strongly recommended. To

avoid this effort, the reference design provided for the ADF7020

RF module can be used.

As with the external Rx/Tx switch, an additional LPF or BPF

might be required to suppress harmonics in the transmit

spectrum or to improve the resilience of the receiver against

out-of-band interferers.

TRANSMIT PROTOCOL AND CODING

CONSIDERATIONS

PREAMBLE

SYNC

WORD

FIELD

DATA FIELD

CRC

Figure 20. Typical Format of a Transmit Protocol

A dc-free preamble pattern is recommended for FSK/ASK/

OOK demodulation. The recommended preamble pattern is a

dc-free pattern such as a 10101010… pattern. Preamble patterns

with longer run-length constraints such as 11001100…. can also

be used. However, this results in a longer synchronization time

of the received bit stream in the receiver.

Manchester coding can be used for the entire transmit protocol.

However, the remaining fields that follow the preamble header

do not have to use dc-free coding. For these fields, the ADF7020

can accommodate coding schemes with a run-length of up to

6 bits without any performance degradation.

If longer run-length coding must be supported, the ADF7020

has several other features that can be activated. These involve a

range of programmable options that allow the envelope detector

output to be frozen after preamble acquisition.

IMAGE REJECTION CALIBRATION

The image channel in this receiver, with an IF at 200 kHz, is at

−200 kHz or +400 kHz below the desired signal. The polyphase

filter rejects this image with an asymmetric frequency response.

The image rejection performance of the receiver is dependent

on how well matched in amplitude the I and Q signals are, and

how perfect the quadrature is between them, that is, how close

to 90° apart they are. The uncalibrated image rejection perform-

ance is approximately 30 dB. However, it is possible to improve

on this performance by adjusting the I/Q phase/gain adjust bits

in Register 10, resulting in an image rejection of approximately

45 dB.

Bits R10_DB(24:27) adjust the relative phase of the signal

and Bits R10_DB(16:20) adjust the relative amplitude (see

Figure 20).

POLYPHASE

FILTER

LO Q

LO I

GAIN

PHASE

LNA

MIXERS

Figure 20. Phase/Gain Adjustment on ADF7020

DEVICE PROGRAMMING AFTER INITIAL

POWER-UP

Basic mode is the minimum number of write sequences to

power up the device. Enhanced mode uses the additional

features of the ADF7020 to tailor the part to a particular

application such as setting up a sync byte sequence or doing

automatic frequency control.

The sample setting is for the following setup:

FRF = 915 MHz, FSK, DR = 9.868 kbps, ICP = 1.44 mA

FDEV = 50 kHz, XTAL = 10 MHz, Correlator/Demodulator

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