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TMS320DM641 Datasheet(PDF) 140 Page - Texas Instruments |
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TMS320DM641 Datasheet(HTML) 140 Page - Texas Instruments |
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140 / 171 page ![]() Multichannel Buffered Serial Port (McBSP) 140 June 2003 − Revised August 2004 SPRS222C Bit(n-1) (n-2) (n-3) Bit 0 Bit(n-1) (n-2) (n-3) 14 12 11 10 9 3 3 2 8 7 6 5 4 4 3 1 3 2 CLKS CLKR FSR (int) FSR (ext) DR CLKX FSX (int) FSX (ext) FSX (XDATDLY=00b) DX † Parameter No. 13 applies to the first data bit only when XDATDLY ≠ 0. 13† 13† Figure 4−42. McBSP Timing Table 4−45. Timing Requirements for FSR When GSYNC = 1 (see Figure 4−43) NO. −400 −500 −600 UNIT MIN MAX 1 tsu(FRH-CKSH) Setup time, FSR high before CLKS high 4 ns 2 th(CKSH-FRH) Hold time, FSR high after CLKS high 4 ns 2 1 CLKS FSR external CLKR/X (no need to resync) CLKR/X (needs resync) Figure 4−43. FSR Timing When GSYNC = 1 |
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