MSP4458G datasheet(42/85 Pages) MICRONAS

42 / 85 page

MSP 44x8G

PRELIMINARY DATA SHEET

Micronas

4.3. Pin Descriptions

Pin numbers refer to the 80-pin PQFP package.

Pin 1, NC – Pin not connected.

Pin 2, I2C_CL – I2C Clock Input/Output (Fig. 4–8)

Via this pin, the I2C-bus clock signal has to be sup-

plied. The signal can be pulled down by the MSP in

case of wait conditions.

Pin 3, I2C_DA – I2C Data Input/Output (Fig. 4–8)

Via this pin, the I2C-bus data is written to or read from

the MSP.

Pin 4, I2S_CL – I2S Clock Input/Output (Fig. 4–11)

Clock line for the synchronous I2S bus. In master

mode, this line is driven by the MSP; in slave mode, an

external I2S clock has to be supplied.

Pin 5, I2S_WS – I2S Word Strobe Input/Output

(Fig. 4–11)

Word strobe line for the synchronous I2S bus. In mas-

ter mode, this line is driven by the MSP; in slave mode,

an external I2S word strobe has to be supplied.

Pin 6, I2S_DA_OUT1 – I2S Data Output (Fig. 4–7)

Output of digital serial sound data of the MSP on the

synchronous I2S bus.

Pin 7, I2S_DA_IN1 – I2S Data Input 1 (Fig. 4–9)

First input of digital serial sound data to the MSP via

the synchronous I2S bus.

Pin 8, ADR_DA – ADR Bus Data Output (Fig. 4–7)

Output of digital serial data to the DRP 3510A via the

ADR bus.

Pin 9, ADR_WS – ADR Bus Word Strobe Output

(Fig. 4–7)

Word strobe output for the ADR bus.

Pin 10, ADR_CL – ADR Bus Clock Output (Fig. 4–7)

Clock line for the ADR bus.

Pins 11, 12, 13, DVSUP* – Digital Supply Voltage

Power supply for the digital circuitry of the MSP. Must

be connected to a

+5 V power supply.

Pins 14, 15, 16, DVSS* – Digital Ground

Ground connection for the digital circuitry of the MSP.

Pin 17, I2S_DA_IN2 – I2S Data Input 2 (Fig. 4–9)

Second input of digital serial sound data to the MSP

via the synchronous I2S bus. In all packages except

PQFP80, this pin is also connected to the asynchro-

nous I2S interface 3.

Pins 18, NC – Pin not connected.

Pins 19, I2S_CL3 – I2S Clock Input (Fig. 4–9)

Clock line for the asynchronous I2S bus. Since only a

slave mode is available an external I2S clock has to be

supplied.

Pins 20, I2S_WS3 – I2S Word Strobe Input (Fig. 4–9)

Word strobe line for the asynchronous I2S bus. Since

only a slave mode is available an external I2S word

strobe has to be supplied.

Pin 21, RESETQ – Reset Input (Fig. 4–9)

In the steady state, high level is required. A low level

resets the MSP 44x8G.

Pin 22, I2S_DA_IN3 – I2S Data Input 3 (Fig. 4–9)

Input of digital serial sound data to the MSP via the

asynchronous

I2S

bus.

all

packages

except

PQFP80, this pin is also connected to synchronous I2S

interface 2.

Pins 23, NC – Pin not connected.

Pins 24, 25, DACA_R/L – Aux Outputs (Fig. 4–17)

Output of the Aux signal. A 1 nF capacitor to AHVSS

must be connected to these pins. The DC offset on

these pins depends on the selected Aux volume.

Pin 26, VREF2 – Reference Ground 2

Reference analog ground. This pin must be connected

separately to the ground (AHVSS). VREF2 serves as a

clean ground and should be used as the reference for

analog connections to the Main and Aux outputs.

Pins 27, 28, DACM_R/L – Main Outputs

(Fig. 4–17)

Output of the Main signal. A 1 nF capacitor to AHVSS

must be connected to these pins. The DC offset on

these pins depends on the selected Main volume.

Pin 29, 30, 31, 32 NC – Pin not connected.

Pins 33, 34, SC2_OUT_R/L – SCART2 Outputs

(Fig. 4–19)

Output of the SCART2 signal. Connections to these

pins must use a 100-

Ω series resistor and are intended

to be AC-coupled.

Pin 35, VREF1 – Reference Ground 1

Reference analog ground. This pin must be connected

separately to the ground (AHVSS). VREF1 serves as a

clean ground and should be used as the reference for

analog connections to the SCART outputs.

Pins 36, 37, SC1_OUT_R/L – SCART1 Outputs

(Fig. 4–19)

Output of the SCART1 signal. Connections to these

pins must use a 100-

Ω series resistor and are intended

to be AC-coupled.

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