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DS3134 Datasheet(PDF) 161 Page - Dallas Semiconductor

Part # DS3134
Description  Chateau Channelized T1 And E1 And HDLC Controller
PDF  203 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS3134 Datasheet(HTML) 161 Page - Dallas Semiconductor

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DS3134
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Register Name:
PLBM
Register Description: PCI Local Bus Memory Base Address Register
Register Address:
0x110h
lsb
Base Address (Read Only / set to 0h)
PF
TYPE1
TYPE0
MSI
Base Address
Base Address (Read Only / set to 0h)
Base Address
msb
Base Address
Read only bits in the PLBM register are indicated above by being underlined. All other bits are read-
write.
Bit 0 / Memory Space Indicator (MSI). This read only bit is forced to zero to indicate that the Local
Bus is mapped to memory space.
Bits 1 & 2 / Type 0 & Type 1. These read only bits are forced to 00b to indicate that the Local Bus can
be mapped anywhere in the 32 bit address space.
Bit 3 / Prefetchable (PF). This read only bit is forced to zero to indicate that prefetching is not supported
by the device for the Local Bus.
Bits 4 to 19 / Base Address. These read only bits are forced to zero to indicate that the Local Bus
requires 1M byte of memory space.
Bits 20 to 31 / Base Address. These read/write bits define the location of the 1M byte memory space that
is mapped to the Local Bus. These bits correspond to the most significant bits of the PCI address space.



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