Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

TUSB3200A Datasheet(PDF) 92 Page - Texas Instruments

Part # TUSB3200A
Description  USB Streaming Controller (STC)
PDF  102 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TUSB3200A Datasheet(HTML) 92 Page - Texas Instruments

Back Button TUSB3200A Datasheet HTML 88Page - Texas Instruments TUSB3200A Datasheet HTML 89Page - Texas Instruments TUSB3200A Datasheet HTML 90Page - Texas Instruments TUSB3200A Datasheet HTML 91Page - Texas Instruments TUSB3200A Datasheet HTML 92Page - Texas Instruments TUSB3200A Datasheet HTML 93Page - Texas Instruments TUSB3200A Datasheet HTML 94Page - Texas Instruments TUSB3200A Datasheet HTML 95Page - Texas Instruments TUSB3200A Datasheet HTML 96Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 92 / 102 page
background image
TUSB3200A
SLES018B – OCTOBER 2001 – REVISED FEBRUARY 2011
www.ti.com
A.5.5.4
I2C Interface Control and status register (I2CCTL
− Address FFC0h)
The I2C interface control and status register contains various control and status bits used for the I2C
interface operation.
BIT
7
6
5
4
3
2
1
0
MNEMONIC
RXF
RXIE
ERR
FRQ
TXE
TXIE
STPRD
STPWR
TYPE
R
R/W
R/W
R/W
R
R/W
R/W
R/W
DEFAULT
0
0
0
0
0
0
0
0
BIT
MNEMONIC
NAME
DESCRIPTION
7
RXF
Receive data register full
The receive data register full bit is set to a 1 by hardware when a new data
byte has been received into the receive data register from the slave device.
This bit is read only and is cleared to a 0 by hardware when the MCU reads
the new byte from the receive data register. Note that when the MCU writes
to the interrupt vector register, the I2C receive data register full interrupt will
be cleared but this status bit will not be cleared at that time.
6
RXIE
Receive interrupt enable
The receive interrupt enable bit is set to a 1 by the MCU to enable the I2C
receive data register full interrupt.
5
ERR
Error condition
The error condition bit is set to a 1 by hardware when the slave device does
not respond. This bit is read/write and can only be cleared by the MCU.
4
FRQ
Frequency select
The frequency select bit is used by the MCU to program the I2C serial clock
(SCL) output signal frequency. A value of 0 sets the SCL frequency to 100
kHz and a value of 1 sets the SCL frequency to 400 kHz.
3
TXE
Transmit data register empty
The transmit data register empty bit is set to a 1 by hardware when the data
byte in the transmit data register has been sent to the slave device. This bit is
read only and is cleared to a 0 by hardware when a new data byte is written
to the transmit data register by the MCU. Note that when the MCU writes to
the interrupt vector register, the I2C transmit data register empty interrupt will
be cleared but this status bit will not be cleared at that time.
2
TXIE
Transmit interrupt enable
The transmit interrupt enable bit is set to a 1 by the MCU to enable the I2C
transmit data register empty interrupt.
1
STPRD
Stop
− read transaction
The stop read transaction bit is set to a 1 by the MCU to enable the hardware
to generate a stop condition on the I2C bus after the next data byte from the
slave device is received into the receive data register. The MCU should clear
this bit to a 0 after the read transaction has concluded.
0
STPWR
Stop
− write transaction
The stop write transaction bit is set to a 1 by the MCU to enable the
hardware to generate a stop condition on the I2C bus after the data byte in
the transmit data register is sent to the slave device. The MCU should clear
this bit to a 0 after the write transaction has concluded.
A.5.6 PWM Registers
This section describes the memory-mapped registers used for the PWM output control and operation. The
PWM output has a set of three registers.
A.5.6.1
PWM Frequency Register (PWMFRQ
− Address FFBFh)
The PWM frequency register contains the control bits for programming the frequency of the PWM output
and for enabling the PWM output circuitry.
BIT
7
6
5
4
3
2
1
0
MNEMONIC
PWMEN
FRQ6
FRQ5
FRQ4
FRQ3
FRQ2
FRQ1
FRQ0
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DEFAULT
0
0
0
0
0
0
0
0
BIT
MNEMONIC
NAME
DESCRIPTION
7
PWMEN
PWM output enable
The PWM output enable bit is set to a 1 by the MCU to enable the PWM
output circuitry.
6:0
FRQ(6:0)
PWM frequency
The PWM frequency control bits are set by the MCU to program the
frequency of the PWM output signal. The frequency range defined by the
7-bit value is from 00h = 732.4 Hz to EFh = 93.75 kHz.
92
MCU Memory and Memory-Mapped Registers
Copyright © 2001–2011, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TUSB3200A



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com