LE25S161 datasheet(45/54 Pages) ONSEMI

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LE25S161

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13. Hardware Data Protection

LE25S161 incorporates a power-on reset function. The following conditions must be met in order to ensure that the power

reset circuit will operate stably.

No guarantees are given for data in the event of an instantaneous power failure occurring during the writing period.

Figure 26. Power-down Timing

Power-down timing

Parameter

Symbol

spec

unit

min

max

power-down time

tPD

power-down voltage

VBOT

0.2

14. Software Data Protection

The LE25S161 eliminates the possibility of unintentional operations by not recognizing commands under the following

conditions.

• When a write command is input and the rising CS edge timing is not in a byte cycle (8 CLK units of SCK)

• When the Page Program data is not in 1-byte increments

• When the Write Status Register command is input for 2 bytes cycles or more

15. Decoupling Capacitor

0.1

µF ceramic capacitor must be provided to each device and connected between VDD and VSS in order to ensure that the

device will operate stably.

VDD(Max)

VDD(Min)

VDD

vBOT

tPD

LE25S161 Datasheet(PDF) 45 Page - ON Semiconductor