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LE25S161 Datasheet(PDF) 27 Page - ON Semiconductor

Part # LE25S161
Description  Serial Flash Memory
PDF  54 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

LE25S161 Datasheet(HTML) 27 Page - ON Semiconductor

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LE25S161
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10-10. Page Program
10-10-1. Normal Page Program (PP)
10-10-2. Low-Power Page Program (PPL)
There are two Page Program commands, Normal program (PP: 02h ) and Low-Power program (PPL: 0Ah) These two
commands are completely functionally the same. By selecting the Low-Power program (PPL), the operating current is
reduced, but the program cycle time is extended. (Iccpp > Iccppl , tPPL > tPP)
Page Program is an operation that programs any number of bytes from 1 to 256 bytes within the same sector page (page
addresses: A20 to A8). Before initiating Page Program, the data on the page concerned must be erased using Small Sector
Erase, Sector Erase, or Chip Erase. Page Program (PP, PPL) allows only previous erased data (FFh).
"Figure 13. Normal Page Program (PP)". "Figure 14. Low-power Page Program (PPL)" shows the timing waveforms.
"Figure 35. Page Program Flowcharts" shows the flowcharts.
The sequence of PP or PPL operation :
CS goes to low  input PP command (02h) or PPL command (0Ah)
 3 Byte address (A23-A0) input on SI
 n-Byte data input on SI 
 CS goes to high (be executed by the rising CS edge)
The program data must be loaded in 1-byte increments. If the data loaded has exceeded 256 bytes, the 256 bytes loaded
last are programmed. After the correct input sequence the internal program operation is executed by the rising CS edge,
and it is completed automatically by the control exercised by the internal timer (tPP or tPPL). The end of program
operation can also be detected by status register (RDY).
Figure 13. Normal Page Program (PP)
● Address A23 to A21 are "Don't care".
Byte 1
Byte 2
Byte
256
Add
(A7-A0)
Add
(A15-A8)
Add
(A23-A16)
tPP
Self-timed
Program Cycle
SCK
SI
High Impedance
SO
CS
PD
02h
PD
15
0
1
2
3
4
5
6
7
8
23
16
24
31 32
39 40
47
Mode3
Mode0
8CLK
PD
2079
MSB
Figure 14. Low-Power Page Program (PPL)
● Address A23 to A21 are "Don't care".
Byte 1
Byte 2
Byte
256
Add
(A7-A0)
Add
(A15-A8)
Add
(A23-A16)
tPPL
Self-timed
Program Cycle
SCK
SI
High Impedance
SO
CS
PD
0Ah
PD
15
0
1
2
3
4
5
6
7
8
23
16
24
31 32
39 40
47
Mode3
Mode0
8CLK
PD
2079
MSB



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