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LE25S161 Datasheet(PDF) 20 Page - ON Semiconductor

Part # LE25S161
Description  Serial Flash Memory
PDF  54 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

LE25S161 Datasheet(HTML) 20 Page - ON Semiconductor

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LE25S161
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Standard SPI Read
There are two Read commands, "Low-Power Read (RDLP: 03h)" and "High-Speed Read (RDHS: 0Bh)".
10-5. Standard SPI Read
There are two Read commands, Low-Power Read (RDLP) and High-Speed Read (RDHS).
10-5-1. Low-Power Read command (RDLP)
Maximum Clock frequency: 33.33MHz
This command is for reading data out.
"Figure 6. Low-Power Read (RDLP)" shows the timing waveforms.
The sequence of RDLP operation :
CS goes to low  input RDLP command (03h)  3 Byte address (A23-A0) input on SI
 the corresponding data out on SO
 continuous data out (n-byte) 
 completed by CS=high
* The data output starts from the falling edge of SCK(31th clock)
The Address is latched on rising edge of SCK, and the corresponding data is shifted out on SO by the falling edge of SCK.
The address is automatically incremented to the next higher address after each byte data is shifted out. If the SCK input is
continued after the internal address arrives at the highest address (1FFFFFh), the internal address returns to the lowest
address (000000h). By setting CS to high, the device is deselected, and the read cycle is completed. While the device is
deselected, the output pin SO is in a high-impedance state.
Figure 6. Low-Power Read (RDLP)
● Address A23 to A21 are "Don't care".
Add
(A7-A0)
Add
(A15-A8)
Add
(A23-A16)
Byte 3
Byte 2
Byte 1
CS
High Impedance
DATA
DATA
DATA
SCK
SO
SI
03h
15
MSB
MSB
MSB
0
1
2
3
4
5
6
7
8
23
16
24
31
39
47
8CLK
Mode0
Mode3
32
40



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