LE25S161

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48

16-7. AC Characteristics

Parameter

Symbol

Ratings

unit

min

typ

max

Clock

frequency

Low-Power Read (RDLP: 03h)

fCLK

33.33

MHz

Dual Output Read (RDDO: 3Bh)

Dual I/O Read

(RDIO: BBh)

50

Other instructions

70

Input signal rising/falling time

tRF

0.1

V/ns

SCK logic high level pulse

width

33.33MHz

tCLHI

11

ns

50MHz

8

70MHz

6

SCK logic low level pulse

width

33.33MHz

tCLLO

11

ns

50MHz

8

70MHz

6

CS active setup time

tSLCH

6

ns

CS not active hold time

tCHSL

6

ns

Data setup time

tDS

3

ns

Data hold time

tDH

3

ns

CS wait pulse width

tCPH

20

ns

CS active hold time

tCHSH

6

ns

CS not active setup time

tSHCH

6

ns

Output high impedance time from CS

tCHZ

8

ns

Output data time from SCK

33.33MHz

tV

10

ns

50MHz

8

70MHz

8

Output data hold time

tHO

1

ns

Output low impedance time from SCK

tCLZ

0

ns

HOLD setup time

tHS

6

ns

HOLD hold time

tHH

6

ns

Output low impedance time from HOLD

tHLZ

8

ns

Output high impedance time from HOLD

tHHZ

8

ns

WP setup time

tWPS

20

ns

WP hold time

tWPH

20

ns

Write status register time

tWRSR

5

8

ms

Normal Page Programming

cycle time

256Byte

tPP

0.40

0.70

ms

nByte

0.14 +

n * 0.26/256

0.35 + n * 0.35/256

Low-Power Page Programming

cycle time

256Byte

tPPL

0.60

1.20

ms

nByte

0.14 +

n * 0.46/256

0.50 + n * 0.70/256

Small Sector Erase cycle time

tSSE

10

120

ms

Sector Erase cycle time

tSE

15

150

ms

Chip Erase cycle time

tCHE

210

2400

ms

Recovery time from suspend

tRSUS

40

µs

Deep Power-down time

tDP

5

µs

Deep Power-down recovery time

tRDP

40

µs

Internal reset time

tRST

40

µs

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be

indicated by the Electrical Characteristics if operated under different conditions.