ADA2200ARUZ datasheet(13/25 Pages) AD

13 / 25 page

ADA2200

Data Sheet

The output of the mixer (if implemented as a multiplier) is then

½VBVREFcos(ϕB − ϕREF) − ½VBVREFcos(2ωREFt + ϕB + ϕREF)

This signal is a dc signal and an ac signal at twice the reference

frequency. If the LPF is sufficient to remove the ac signal, the

signal at the LPF output (D) is

½VB

VREFcos(ϕB − ϕREF)

The LPF output is a dc signal that is proportional to both the

magnitude and phase of the signal at the BPF output (B). When

the input amplitude is held constant, the LPF output enables can

be used to measure the phase. When the input phase is held

constant, the LPF can be used to measure amplitude.

Note that the reference signal is not required to be a pure sine

wave. The excitation signal and demodulation signal must only

share a common frequency and phase to employ phase sensitive

detection. In some applications, it may be possible to use the

square wave output from the ADA2200 RCLK output directly.

Internal to the ADA2200, the demodulation is performed not

by multiplying the REFCLK signal with the input signal, but by

holding the output constant for ½ the sample output periods.

This operation is similar to a half wave demodulation of the

input signal. For more information on signal detection using

this function, see the Applications Information section.

ADA2200 ARCHITECTURE

The signal path for the ADA2200 consists of a high impedance input

buffer followed by a fixed low-pass filter (FIR decimation filter),

a programmable IIR filter, a mixer function, and a differential pin

driver. Figure 19 shows a detailed block diagram of the ADA2200.

The signal processing blocks are all implemented using a charge

sharing technique.

Figure 19. ADA2200 Architecture

DECIMATION FILTER

The clock signal divider (after CLKIN) determines the input

sampling frequency, fSI, of the decimation filter. The decimation

filter produces one filtered sample for every eight input samples.

Figure 20 shows the wideband frequency response of the

decimation filter. Because the filter operates on sampled data,

images of the filter appear at multiples of the input sample rate,

fSI. The stop band of the decimation filter begins around ½ of the

output data rate, fSO. Because an image pass band exists around

fSI, any undesired signals in the pass band around fSI alias to dc

and are indistinguishable from the low frequency input signal.

To preserve the full dynamic range of the ADA2200, use an

input antialiasing filter if noise at frequencies above 7.5 fSI is not

lower than the noise floor of the frequencies of interest. A first-

order low-pass filter is usually sufficient for the antialiasing filter.

Figure 20. Decimation Filter Frequency Response

Figure 21 shows a more narrow bandwidth view of the

decimation transfer function. The stop band of the decimation

filter starts at ½ of the output sample rate. The stop band rejection

of the decimator low-pass filter is approximately 55 dB. The

pass band of the decimation filter extends to 1/4th of the output

sample rate or 1/32nd of the decimator input sample rate.

Figure 21. Decimation Filter Transfer Function, fSI = 800 kHz

INP

INN

OUTP

OUTN

VOCM

SCLK/SCL

SDIO/SDA

CS/A0

RCLK/SDO

VDD

LPF

PROGRAM

FILTER

CLOCK

GEN

CONTROL

REGISTERS

SPI

BOOT FROM

EEPROM (I2C)

VCM

÷2n+1

÷2m

÷8

90°

fSO

fSI

fMOD

XOUT

CLKIN

SYNCO

GND

RST

BOOT

ADA2200

0.5

fSO

2fSO

7.5fSO

8fSO = fSI

fSI – f fSI + f

8.5fSO

FREQUENCY

–10

–40

–70

–90

fSO/2

fSO/4

fSO

–20

–30

–50

–60

–80

fSO/4

Rev. 0 | Page 12 of 24

ADA2200ARUZ Datasheet(PDF) 13 Page - Analog Devices

ADA2200ARUZ Datasheet(HTML) 13 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL