ADA2200ARUZ datasheet(18/25 Pages) AD

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Data Sheet

ADA2200

The inverse sine or inverse cosine functions linearize the

relationship between the relative phase of the signal and the

measured angle. Because the inverse sine and inverse cosine are

only defined in two quadrants, the sign of I and Q must be

considered to map the result over the entire 360° range of

possible relative phase values. The use of the inverse tangent

function is not recommended because the phase measurements

become extremely sensitive to noise as the calculated phase

approaches ±90°.

ANALOG OUTPUT SYSTEMS

When the output signal of the ADA2200 is used in the analog

domain or if it is sampled asynchronously to the ADA2200 sample

clock, it is likely that a reconstruction filter is required.

Reconstruction Filters

The bandwidth of the analog reconstruction filter sets the

demodulation bandwidth of the analog output. There is a direct

trade-off between the noise and demodulation bandwidth.

Therefore, it is recommended to ensure that the reconstruction

filter cutoff frequency is as low as possible while minimizing the

attenuation of the demodulated signal of interest.

Similar to a digital-to-analog converter (DAC), the output of

the ADA2200 is a stepwise continuous output. This waveform

contains positive and negative images of the desired signal at

multiples of fSO. In most cases, the images are undesired noise

components that must be attenuated.

The lowest frequency image to appear in the output spectrum

appears at a frequency of fSO − fIN. The image amplitude is

reduced by the sin(x)/x roll-off. System accuracy requirements

may dictate that additional low-pass filtering is required to remove

the output sample images.

INTERFACING TO ADCS

Settling Time Considerations

If the ADC is coherently sampling the ADA2200 outputs,

design the output filter to ensure that the output samples settle

prior to ADC sampling. The output filter does not need to

remove the sampling images generated by the ADA2200. The

images are inherently rejected by the ADC sampling process.

Clock Synchronization

The SYNCO output can trigger the ADC sampling process

directly, or a microcontroller can use SYNCO to adjust the

ADC sampling time. Adjusting the SYNCO pulse timing can

maximize the available time for the ADA2200 outputs to settle

prior to ADC sampling.

Multichannel ADCs

In multichannel systems that require simultaneous sampling,

the ADA2200 can provide per channel programmable filtering

and simultaneous sampling.

Figure 26 shows an 8-channel system with a 1 MHz aggregate

throughput rate. The ADA2200 samples each channel at 1 MSPS

and produces filtered samples at an output sample rate of 125 kHz

each. The AD7091R-8 is an 8-channel, 1 MHz ADC with

multiplexed inputs, which cycle through the eight channels at

125 kHz, producing an aggregate output sample rate of 1 MHz.

Figure 26. ADA2200 in an 8-Channel Simultaneous Sampling Application

LOCK-IN AMPLIFIER APPLICATION

Figure 27 shows the ADA2200 in a lock-in amplifier

application. The 80 kHz master clock signal sets the input

sample rate of the decimation filter, fSI. The output sample rate

is 10 kHz. In the default configuration, the excitation signal

generated by RCLK is 1.25 kHz. This is also the center

frequency of the on-chip IIR filter.

In many cases, the RCLK signal is buffered to provide a square

wave excitation signal to the sensor. It may also be desirable to

provide further signal conditioning to provide a sine wave

excitation signal to the sensor.

A low noise instrumentation amplifier provides sufficient gain

to amplify the signal so that the noise floor of the signal into the

ADA2200 is above the combined noise floor of the ADA2200

and the ADC referred to the ADA2200 inputs.

Figure 27. Lock-In Amplifier Application

In default mode, the ADA2200 produces eight output samples

for every cycle of the excitation (RCLK) signal. There are four

unique output sample values. The fourth value appears on the

output for five consecutive output sample periods.

SIMULTANEOUS

SAMPLING AND

FILTERING

8 CHANNELS

SIMULTANEOUSLY

SAMPLED

AT 125kHz EACH

MICRO-

CONTROLLER

CH1

CH2

ADA2200

SYNCO

ADA2200

CH8

ADA2200

12-BIT

ADC

8:1

MUX

SEQUENCER

AD7091R-8

IRQ

CLK0

SCLK

DOUT

MISO

DIN

MOSI

CLKIN

1MHz

SAMPLE

CLOCK

CLKIN

SYNCO

RCLK/SDO

INP

OUTP

INN

OUTN

VOCM

VDD

GND

ADA2200

SENSOR

EXCITATION

CONDITIONING

3.3V

DUT

SENSOR

REF

AD8227

AD7170

MASTER

CLOCK

AD8613

Rev. 0 | Page 17 of 24

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