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ZSC31014 Datasheet(PDF) 8 Page - Integrated Device Technology

Part # ZSC31014
Description  Digital Output Sensor Signal Conditioner
PDF  58 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ZSC31014 Datasheet(HTML) 8 Page - Integrated Device Technology

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ZSC31014 Datasheet
© 2016 Integrated Device Technology, Inc.
8
January 20, 2016
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Sink Current
IOL_SDA/MISO
SDA/MISO @VOl = 0.2v
2.3
3.9
6.2
mA
IOL_INT/SS
INT/SS @VOl= 0.2v
0.85
1.7
3.0
mA
Load Capacitance at SDA
CSDA
@ 400kHz
200
pF
Pull-up Resistor
RI2C_PU
500
Ω
Input Capacitance (each pin)
CI2C_IN
10
pF
TOTAL SYSTEM
Frequency Variation
fvar
All timing in the specification is
subject to this variation.
±15
%
Start-Up-Time
3), 4), 5)
(Power-up to data ready)
tSTA
@
4MHz(EEPROM locked)
@
4MHz(EEPROM unlocked)
2.8
7.3
3.2
8.4
ms
@
1MHz(EEPROM locked)
@
1MHz(EEPROM unlocked)
6.0
10.4
6.9
12
Response Time
3), 4), 5)
(Time to data ready)
fmeas
@
4MHz
0.5
ms
@
1MHz
1.6
Overall Linearity Error
6), 7), 8)
ELIND
Within 5% to 95% of full-scale
differential input.
±0.05
%FSO
Overall Ratiometricity Error
6), 9)
REout
VDD ± 10%
±0.025
±0.1
%FSO
Overall Absolute Error
6), 10)
ACout
-25°C to +85°C, VDD ± 10%
±0.1
%FSO
-40°C to +125°C, VDD ± 10%
±0.25
%FSO
1)
Measured at highest PreAmp_Gain setting and -1/2 to 1/2 A2D_Offset setting.
2)
Parameter not tested during production test but guaranteed by design.
3)
In Update Rate Mode at fastest update rate.
4)
See section 3.1 for more details.
5)
Parameter indirectly tested during production test.
6)
Bridge input to digital output.
7)
For applications where Vdd <3.5V using A2D offsets 15/16, 7/8, 1/8, or 1/16, a slight overall linearity improvement of 0.015% FSO can be achieved.
8)
FSO = percent full-scale output.
9)
For high preamp gain (
≥96) in conjunction with high clock frequency and normal integration (4MHz, longInt=0), the ratiometricity error can be ≤0.3%.
10)
For applications requiring high preamp gain (
≥96) in conjunction with a high clock frequency (4 MHz), calibration using three temperature points is
required in order to achieve the specified “Overall Absolute Error.” If calibration is performed using only two temperature points, the specified
maximum error values must be increased by a factor of 3. A calibration using only one temperature point is not recommended for applications with
high preamp gain (
≥96) in conjunction with a high clock frequency (4 MHz).



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