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ZSC31014 Datasheet

January 20, 2016

Table 2.4

A2D_Offset Signals

A2D_Offset[3:0]

Auto-Zero Output Count of

A2D (+/- 250 Codes)

A2D Input

Range [VREF]

A2D_Offset

Offset_B[15:0]

FHEX

15360

-15/16 to 1/16

15/16

1C00HEX

EHEX

14336

-7/8 to 1/8

7/8

1800HEX

DHEX

13312

-13/16 to 3/16

13/16

1400HEX

CHEX

12288

-3/4 to 1/4

3/4

1000HEX

BHEX

11264

-11/16 to 5/16

11/16

0C00HEX

AHEX

10240

-5/8 to 3/8

5/8

0800HEX

9HEX

9216

-9/16 to 7/16

9/16

0400HEX

8HEX

8192

-1/2 to 1/2

1/2

0000HEX

7HEX

7168

-7/16 to 9/16

7/16

FC00HEX

6HEX

6144

-3/8 to 5/8

3/8

F800HEX

5HEX

5120

-5/16 to 11/16

5/16

F400HEX

4HEX

4096

-1/4 to 3/4

1/4

F000HEX

3HEX

3072

-3/16 to 13/16

3/16

EC00HEX

2HEX

2048

-1/8 to 7/8

1/8

E800HEX

1HEX

1024

-1/16 to 15/16

1/16

E400HEX

0HEX

0 to 16/16

E000HEX

A setting of 0000BIN for the A2D offset can only be used for internal temperature measurements, which are factory-trimmed (do not change default

setting). If it is used for bridge measurements, it could lead to the auto-zero saturating, which results in poor performance of the IC.

Figure 2.2 shows a functional diagram of the ADC. The A/D block at the right side is assumed to be an ideal

differential ADC. The summing node B models the offset voltage, which is caused by the tolerance of process

parameters and other influences including temperature and changes of power supply. The summing node A adds

a voltage, which is controlled by the digital input A2D_Offset. This internal digital-to-analog converter (DAC, D2A)

uses binary-weighted capacitors, which are part of the switched capacitor network of the ADC. This DAC function

allows optimal adjustment of the input voltage range of the ADC to the amplified output voltage range of the

sensor. All signals in this diagram are shown as single-ended for simplicity in understanding the concept; all

signals are actually differential. An auto-zero reading is accomplished by short-circuiting the differential ADC

input.

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