ZSC31014 datasheet(10/58 Pages) IDT

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ZSC31014 Datasheet

January 20, 2016

1.4.2.

Sleep Mode Current Consumption

Figure 1.3

Sleep Mode Current Consumption

1.5. Analog Input versus Output Resolution

The ZSC31014 has a fully differential chopper-stabilized preamplifier with 8 programmable gain settings through a

14-bit analog-to-digital converter (ADC). The resolution of the output depends on the input span (bridge

sensitivity) and the analog gain setting programmed. Analog gains available are 1.5, 3, 6, 12, 24, 48, 96, and

192.*

Table 1.4 gives the guaranteed minimum resolution for a given bridge sensitivity range for the eight analog gain

settings. At higher analog gain settings, there will be higher output resolution, but the ability of the ASIC to handle

large offsets decreases. This is expected because the offset is also amplified by the analog gain and can

therefore saturate the ADC input.

* For previous silicon revision A, the available analog gain settings are 1, 3, 5, 15, 24, 40, 72, and 120. See ZSC31014_AFE_Settings.xls for

table values for revision A.

Sleep IDD at Vdd = 5.5V with 3 Sigma

0.100

1.000

10.000

100.000

-50.000

0.000

50.000

100.000

150.000

Temperature (°C)

Sleep IDD at VDD = 5.5V with 3 Sigma

ZSC31014 Datasheet(PDF) 10 Page - Integrated Device Technology