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DS2196 Datasheet(PDF) 57 Page - Dallas Semiconductor |
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DS2196 Datasheet(HTML) 57 Page - Dallas Semiconductor |
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57 / 157 page ![]() DS2196 57 of 157 Table 7-1: RECEIVE T1 LEVEL INDICATION RL1 RL0 TYPICAL LEVEL RECEIVED 0 0 +2 dB to –7.5 dB 0 1 –7.5 dB to –15 dB 1 0 –15 dB to –22.5 dB 1 1 less than –22.5 dB NOTE: The RAIS-CI bit is qualified with the RBL status bit (SR1A.3 and SR1B.3). Hence the RAIS-CI status bit will not be set unless the RBL status bit is set. If the RBL bit is set and the RAIS-CI bit has transitioned from a 1 to a 0 (i.e., it has cleared), it is recommended that the software wait at lest 1.5 seconds and then read the RAIS-CI bit again to make sure that the alarm has indeed cleared. SR1A: STATUS REGISTER 1 FRAMER A (Address = 20 Hex) (MSB) (LSB) LUP LDN LOTC LSPARE RBL RYEL FRCL RLOS SYMBOL POSITION NAME AND DESCRIPTION LUP SR1A.7 Loop Up Code Detected. Set when the loop up code as defined in the RUPCD register is being received. See Section 12 for details. LDN SR1A.6 Loop Down Code Detected. Set when the loop down code as defined in the RDNCD register is being received. See Section 12 for details. LOTC SR1A.5 Loss of Transmit Clock. Set when the TCLKA pin has not transitioned for one channel time (or 5.2 ms). Will force the RLOSA/LOTCA pin high if enabled via CCR1A.6. Also will force transmit side formatter to switch to MCLK if so enabled via TCR1A.7. LSPARE SR1A.4 Spare Code Detected. Set when the spare code as defined in the RSPARE register is being received. See Section 12 for details. RBL SR1A.3 Receive Blue Alarm. Set when an unframed all 1’s code is received at RPOSIA and RNEGIA. RYEL SR1A.2 Receive Yellow Alarm. Set when a yellow alarm is received at RPOSIA and RNEGIA. FRCL SR1A.1 Framer Receive Carrier Loss. Set when a red alarm is received at RPOSIA and RNEGIA. RLOS SR1A.0 Receive Loss of Sync. Set when the device is not synchronized to the receive T1 stream. |
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