DS2196 datasheet(15/157 Pages) DALLAS

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DS2196

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Signal Name:

RLOSA/B / LOTCA/B

Signal Description:

Receive Loss of Sync / Loss of Transmit Clock

Signal Type:

Output

A dual function output that is controlled by the CCR3.5 control bit. This pin can be programmed to either toggle

high when the synchronizer is searching for the frame and multiframe or to toggle high if the TCLK pin has not

been toggled for 5

msec.

Signal Name:

RBPVA/B

Signal Description:

Receive BPV

Signal Type:

Output

This pin will toggle high for one RCLKA or RCLKB clock cycle for each bipolar Violation (BPV) detected by the

framer.

Signal Name:

RPOSIA/B

Signal Description:

Receive Positive Data Input

Signal Type:

Input

Sampled on the falling edge of RCLKIA and either rising or falling edge of RCLKIB for data to be clocked

through the receive side framer. RPOSIA

/B and RNEGIA/B can be tied together for a NRZ interface.

RPOSIA be internally connected to RPOSLO via the CCR4A.2 control bit.

Signal Name:

RNEGIA/B

Signal Description:

Receive Negative Data Input

Signal Type:

Input

Sampled on the falling edge of RCLKI for data to be clocked through the receive side framer. RPOSIA/B and

RNEGIA/B can be tied together for a NRZ interface. RNEGIA be internally connected to RNEGLO via the

CCR4A.2 control bit.

Signal Name:

RCLKIA/B

Signal Description:

Receive Clock Input

Signal Type:

Input

Signal used to clock data through the receive side framers. RCLKIA can be internally connected to RCLKLO via

the CCR4A.2 control bit.

User Port Pins

Signal Name:

UOP0/1/2/3

Signal Description:

User Output Port

Signal Type:

Output

These output port pins can be set low or high via the CCR7B.0 to CCR7B.3 control bits. The pins are forced low

on power-up.

DS2196 Datasheet(PDF) 15 Page - Dallas Semiconductor

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