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DS2196 Datasheet(PDF) 155 Page - Dallas Semiconductor

Part # DS2196
Description  T1 Dual Framer LIU
PDF  157 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2196 Datasheet(HTML) 155 Page - Dallas Semiconductor

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DS2196
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Figure 22-10: TRANSMIT SIDE AC TIMING
t
F
t
R
1
TCLK
TSER
TCHCLK
t
t
CL
t
CH
CP
TSYNC
TSYNC
TLINK
TLCLK
TCHBLK
t D2
tD2
tD2
t
t
t
t
t
HD
SU
D2
SU
HD
tHD
2
Notes:
1. TSYNC is in the output mode (TCR2.2 = 1).
2. TSYNC is in the input mode (TCR2.2 = 0).
3. TSER is sampled on the falling edge of TCLK when the transmit side elastic store is disabled.
4. TCHCLK and TCHBLK are synchronous with TCLK when the transmit side elastic store is disabled.
5. TLINK is only sampled during F-bit locations.
6. No relationship between TCHCLK and TCHBLK and the other signals is implied.
5
tSU



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