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DAC38RF86 Datasheet(PDF) 97 Page - Texas Instruments

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Part # DAC38RF86
Description  Dual- or Single-Channel, Single-Ended, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip GSM PLL
PDF  141 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DAC38RF86 Datasheet(HTML) 97 Page - Texas Instruments

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97
DAC38RF86, DAC38RF87
DAC38RF97, DAC38RF96
www.ti.com
SLASEF4 – FEBRUARY 2017
Product Folder Links: DAC38RF86 DAC38RF87 DAC38RF97 DAC38RF96
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
8.5.51 JESD Link Configuration Data Register (address = 0x50) [reset = 0x0000]
Figure 102. JESD Link Configuration Data Register (JESD_LINK_CFG)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
1
0
1
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 92. JESD_Link_CFG Field Descriptions
Bit
Field
Type
Reset
Description
15-12
ADJCNT
R/W
0x0
Lane configuration data for link. Reserved by DAC38RF8x
except for lane configuration checking.
11
ADJDIR
R/W
0
Lane configuration data for link. Reserved by DAC38RF8x
except for lane configuration checking.
10-7
BID
R/W
0x0
Lane configuration data for link. Reserved by DAC38RF8x
except for lane configuration checking.
6-2
CF
R/W
00000
Lane configuration data for link. Reserved by DAC38RF8x
except for lane configuration checking.
1-0
CS
R/W
00
Lane configuration data for link. Reserved by DAC38RF8x
except for lane configuration checking.
8.5.52 JESD Sync Request Register (address = 0x51) [reset = 0x00FF]
Figure 103. JESD Sync Request Register (JESD_SYNC_REQ)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
1
0
1
0
0
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 93. JESD_SYNC_REQ Field Descriptions
Bit
Field
Type
Reset
Description
15:8
DID
R/W
0x00
Lane configuration
7:0
SYNC_REQUEST
R/W
0xFF
These bits select which errors cause a sync request. Sync
requests take priority over the error notification; so if sync
request isn’t desired; set these bits to a ‘0’.
bit 7 = multi-frame alignment error
bit 6 = frame alignment error
bit 5 = link configuration error
bit 4 = elastic buffer overflow (bad RBD value)
bit 3 = elastic buffer end char mismatch (match_ctrl match_data)
bit 2 = code synchronization error
bit 1 = 8b/10b not-in-table code error
bit 0 = 8b/10b disparity error



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