Electronic Components Datasheet Search
  English  ▼

X  

ADT7516 Datasheet(PDF) 33 Page - Analog Devices

Part # ADT7516
Description  SPI/I2C Compatible, Temperature Sensor, Four Channel ADC and Quad Voltage Output DAC
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADT7516 Datasheet(HTML) 33 Page - Analog Devices

Back Button ADT7516 Datasheet HTML 29Page - Analog Devices ADT7516 Datasheet HTML 30Page - Analog Devices ADT7516 Datasheet HTML 31Page - Analog Devices ADT7516 Datasheet HTML 32Page - Analog Devices ADT7516 Datasheet HTML 33Page - Analog Devices ADT7516 Datasheet HTML 34Page - Analog Devices ADT7516 Datasheet HTML 35Page - Analog Devices ADT7516 Datasheet HTML 36Page - Analog Devices ADT7516 Datasheet HTML 37Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 33 / 44 page
background image
ADT7516/ADT7517/ADT7519
Rev. A | Page 33 of 44
Table 40.
Bit
Function
C2:0
In single-channel mode, these bits select between VDD,
the internal temperature sensor, external temperature
sensor/AIN1, AIN2, AIN3, and AIN4 for conversion. The
default is VDD.
000 = VDD.
001 = Internal temperature sensor.
010 = External temperature sensor/AIN1. (Bits C1:C2 of
the Control Configuration 1 register affect this selection).
011 = AIN2.
100 = AIN3.
101 = AIN4.
110–111 = Reserved.
C3
Reserved.
C4
Selects between single-channel and round robin conver-
sion cycle. The default is round robin.
0 = Round robin.
1 = Single channel.
C5
Default condition is to average every measurement on all
channels 16 times. This bit disables this averaging.
Channels affected are temperature, analog inputs, and
VDD.
0 = Enable averaging.
1 = Disable averaging.
C6
SMBus timeout on the serial clock puts a 25 ms limit on
the pulse width of the clock, ensuring that a fault on the
master SCL does not lock up the SDA line.
0 = Disable SMBus timeout.
1 = Enable SMBus timeout.
C7
Software Reset. Setting this bit to 1 causes a software
reset. All registers and DAC outputs will reset to their
default settings.
Control Configuration 3 Register (Read/Write) [Add. =
1Ah]
This configuration register is an 8-bit read/write register that is
used to set up some of the operating modes of the ADT7516/
ADT7517/ADT7519.
Table 41. Control Configuration 3
D7
D6
D5
D4
D3
D2
D1
D0
C7
C6
C5
C4
C3
C2
C1
C0
0*
0*
0*
0*
0*
0*
0*
0*
*Default settings at power-up.
Table 42.
Bit
Function
C0
Selects between fast and slow ADC conversion speeds.
0 = ADC clock at 1.4 kHz.
1 = ADC clock at 22.5 kHz. D+ and D– analog filters are
disabled.
C1
On the ADT7516 and ADT7517, this bit selects between 8-
bit and 10-bit DAC output resolution on the thermal
voltage output feature. The default is 8 bits. This bit has no
effect on the ADT7519 output because this part has only
an 8-bit DAC. For the ADT7519, write 0 to this bit.
Bit
Function
0 = 8-bit resolution.
1 = 10-bit resolution.
C2
Reserved. Write 0 only.
C3
0 = LDAC pin controls updating of DAC outputs.
1 = DAC configuration register and LDAC configu ration
register control updating of DAC outputs.
C4
Selects the ADC reference to be either internal VREF or VDD
for analog inputs.
0 = Internal VREF.
1 = VDD.
C5
Setting this bit selects DAC A voltage output to be
proportional to the internal temperature measurement.
C6
Setting this bit selects DAC B voltage output to be
proportional to the external temperature measurement.
C7
Reserved. Write 0 only.
DAC Configuration Register (Read/Write) [Add. = 1Bh]
This configuration register is an 8-bit read/write register that is
used to control the output ranges of all four DACs and also to
control the loading of the DAC registers if the LDAC pin is
disabled (Bit C3 = 1, Control Configuration 3 register).
Table 43. DAC Configuration
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
0*
0*
0*
0*
0*
0*
0*
0*
*Default settings at power-up.
Table 44.
Bit
Function
D0
Selects the output range of DAC A.
0 = 0 V to VREF.
1 = 0 V to 2VREF.
D1
Selects the output range of DAC B.
0 = 0 V to VREF.
1 = 0 V to 2VREF.
D2
Selects the output range of DAC C.
0 = 0 V to VREF.
1 = 0 V to 2VREF.
D3
Selects the output range of DAC D.
0 = 0 V to VREF.
1 = 0 V to 2VREF.
D5:D
4
00 = MSB write to any DAC register generates LDAC
command that updates that DAC only.
01 = MSB write to DAC B or DAC D register generates
LDAC command that updates DACs A, B or DACs C, D,
respectively.
10 = MSB write to DAC D register generates LDAC
command that updates all four DACs.
11 = LDAC command generated from LDAC register.
D6:D7
Reserved. Write 0s only.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com