M21050 datasheet(52/70 Pages) MA-COM

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Mindspeed Technologies™

21050-DSH-001-F

Mindspeed Proprietary and Confidential

M21050 Data Sheet

3.4

Input/Output Specifications

Table 3-4.

Two-Wire Serial Interface CMOS I/O Electrical Specifications

Symbol

Parameter

Notes

Minimum

Typical

Maximum

Units

VOH

Output logic high IOH = –3 mA

1, 2

0.8 x DVdd_I/O

DVdd_I/O

—V

VOL

Output logic low IOL = 24 mA

1, 2

—

0.0

0.2 x DVdd_I/O

IOL

Output current (logic low)

—

IOH

Output current (logic high)

110

—

VIH

Input logic high

0.75 x DVdd_I/O

—3.6

VIL

Input logic low

—

0.25 x DVdd_I/O

IIH

Input current (logic high)

–100

—

100

µA

IIL

Input current (logic low)

–100

—

100

µA

Output rise time (20-80%)

—

250

Output fall time (20-80%)

—

250

C2wire

Input capacitance of MF4 & MF5 in two-wire

interface

1, 3—

—

10pF

Notes:

1. Specified at recommended operating conditions – see Table 3-2.

2. DVdd_I/O can be chosen independently from AVdd_I/O.

3. Two-wire serial output mode can drive 500 pF.

Table 3-5.

High-Speed Input Electrical Specifications

Symbol

Parameter

Notes

Minimum

Typical

Maximum

Units

DRIN

Input signal data-rate

1, 3

—

3.2

Gbps

VID

Input differential voltage (P-P)

1, 3, 4

125

—

2000

VICM

Input common-mode voltage

800

—

AVdd_Core

RIN

Input termination to VddT

1, 6

Ω

S11

Input return loss (40 MHz to 2.5 GHz)

—

–15.0

—

S11

Input return loss (2.5 GHz to 5 GHz)

1—

–5.0

—

Maximum DC input current

1, 5

—

Notes:

1. Specified at recommended operation conditions – see Table 3-2.

2. Designed for seamless interface to PCML.

3. Example 1200 mVpp differential = 600 mVpp for each single-ended terminal.

4. Minimum input level defined as error free operation at 10-12 BER.

5. Computed as the current through 50 ohms from the voltage difference between the input voltage common mode to VddT.

6. See Figure 3-1 for input termination circuit.

M21050 Datasheet(PDF) 52 Page - M/A-COM Technology Solutions, Inc.

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