M21050 datasheet(35/70 Pages) MA-COM

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Registers

21050-DSH-001-F

Mindspeed Technologies™

Mindspeed Proprietary and Confidential

2.1.13

Built In Self-Test (BIST) Transmitter Main Control Register

2.1.14

Built In Self-Test (BIST) Transmitter PLL Loss of Lock Register

Table 2-13. Built In Self-Test (BIST) Transmitter Main Control Register (BISTtx_ctrl: Address 15h)

Bits

Type

Default

Label

Description

R/W

err_insert

Inserts a single bit error into the PRBS Tx

1b: Insert error

0b: Normal operation

Note: Setting the register high allows one error to be inserted into the

data stream. To insert another error, the user needs to clear, then set

this register bit.

R/W

rx2txclk

Selects the source of the clock for the BIST Tx PLL (active when

BISTtx_ctrl [1] = 1)

0b: External reference frequency

1b: Recovered clock from BIST Rx

Note: For the recovered clock option, the BIST Rx must be enabled with

BISTrx_ctrl [1] = 1, and use the recovered clock from the same CDR

selected by BIST Rx. This option only works for the full-rate case

(DRD = 1).

5:2

R/W

0000b

tx_patt

Selects the BIST Tx test pattern (active when BISTtx_ctrl [1] = 1)

0000b: PRBS 27-1

0001b: PRBS 215-1

0010b: PRBS 223-1

0011b: PRBS 231-1

0100b: Fibre channel CJTPAT

0101b: Fibre channel CRPAT

0110b: 8b/10b countdown pattern

0111b: 16 bit user programmable pattern

1000b: 20 bit user programmable pattern

R/W

en_tx

Powers up the BIST Tx and PLL

0b: Power down

1b: Power up and enable

R/W

tx_rst

Resets the BIST Tx (recommended after powerup/enable; active when

BISTtx_ctrl [1] = 1)

0b: Normal BIST Tx operation

1b: Reset of BIST Tx

Table 2-14. Built In Self-Test (BIST) Transmitter PLL Loss of Lock Register (BISTtx_LOLctrl Address 17h)

Bits

Type

Default

Label

Description

7:5

R/W

101b

tacq_LOL

Sets the value for the LOL reference window

Code

000b

001b

010b

011b

100b

101b

110b

111b

Value

128

256

512

1024

2048

4096

8192

16384

M21050 Datasheet(PDF) 35 Page - M/A-COM Technology Solutions, Inc.

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