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PC87307 Datasheet(PDF) 33 Page - National Semiconductor (TI) |
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PC87307 Datasheet(HTML) 33 Page - National Semiconductor (TI) |
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33 / 218 page ![]() 33 Configuration www.national.com TABLE 2-17. UART2 and Infrared Configuration Registers - Logical Device 5 TABLE 2-18. UART1 Configuration Registers - Logical Device 6 TABLE 2-19. GPIO Ports Configuration Registers - Logical Device 7 Index R/W Hard Reset Soft Reset Configuration Register or Action 30h R/W 00h 00 Activate. See also FER1 of the power management device (logical device 8). 31h R/W 00h 00h I/O Range Check. 60h R/W 02h 02h Base Address MSB register. 61h R/W F8h F8h Base Address LSB register. Bit 2-0 (for A2-0) are read only, 000b. 70h R/W 03h 03h Interrupt Select. 71h R/W 03h 03h Interrupt Type. Bit 1 is R/W; other bits are read only. 74h R/W 04h 04h DMA Channel Select 0 (RX_DMA). 75h R/W 04h 04h DMA Channel Select 1 (TX_DMA). F0h R/W See Section 2.8 on page 38. No Effect SuperI/O UART2 Configuration register. Index R/W Hard Reset Soft Reset Configuration Register or Action 30h R/W 00h 00h Activate. See also FER1 of the power management device (logical device 8). 31h R/W 00h 00h I/O Range Check. 60h R/W 03h 03h Base Address MSB Register. 61h R/W F8h F8h Base Address LSB Register. Bits 2-0 (for A2-0) are read only as 000b. 70h R/W 04h 04h Interrupt Select. 71h R/W 03h 03h Interrupt Type. Bit 1 is read/write. Other bits are read only. 74h R 04h 04h Report no DMA Assignment. 75h R 04h 04h Report no DMA Assignment. F0h R/W See Section 2.9.1 on page 38. No Effect SuperI/O UART 1 Configuration register. Index R/W Hard Reset Soft Reset Configuration Register or Action 30h R/W 00h 00h Activate. See also FER2 of the power management device (logical device 8). 31h R/W 00h 00h I/O Range Check. 60h R/W 00h 00h Base Address MSB Register. 61h R/W 00h 00h Base Address LSB Register. Bit 2-0 (for A2-0) are read only: 000b. 74h R 04h 04h Report no DMA assignment. 75h R 04h 04h Report no DMA assignment. |
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