PC87307 datasheet(43/218 Pages) NSC

43 / 218 page

Keyboard (and Mouse) Controller (KBC) (Logical Devices 0 and 1)

www.national.com

FIGURE 3-1. KBC System Functional Block Diagram

KBDAT

Interrupt Matrix

KBCLK MDAT MCLK

Program

ROM

2 K x 8

Data

RAM

256 x 8

(including

registers

and stack)

I/O Port 2

8-Bit

Serial Open-Collector

Drivers

8-Bit Timer

DBBOUT

DBBIN

STATUS

RD WR

P21-20

P27, P26, P23, P22

TEST1

TEST0

D7-0

Timer

8-Bit Internal Bus

Program

Address

IBF

I/O Interface

PC87307/PC97307 Interface

I/O PORT 1

8-Bit

P11,10

P17, P16, P12

P24

P25

8-Bit

CPU

To PnP

or Counter

Overflow

3.0

Keyboard (and Mouse) Controller

(KBC) (Logical Devices 0 and 1)

The Keyboard Controller (KBC) is a functionally indepen-

dent programmable device controller. It is implemented

physically as a single hardware module on the part multi-I/O

chip and houses two separate logical devices: a keyboard

controller and a mouse controller.

The KBC accepts user input from the keyboard or mouse,

and transfers this input to the host PC via the common

PC87307/PC97307-PC interface.

The KBC is functionally equivalent to the industry standard

8042A keyboard controller, which may serve as a detailed

technical reference for the KBC.

The KBC is delivered preprogrammed with customer-sup-

plied code. KBC firmware code is identical to 8042 code,

and to code of the keyboard controller of the PC87323VUL

chip. The PC87323VUL is recommended as a development

platform for the KBC since it uses identical code and in-

cludes an internal program RAM that enables software de-

velopment

3.1

SYSTEM ARCHITECTURE

The KBC is a general purpose microcontroller, with an 8-bit

internal data bus. See Figure 3-1. It includes the following

functional blocks:

Serial Open-Collector Drivers: Four open-collector bi-di-

rectional serial lines enable serial data exchange with

the external devices (keyboard and mouse) using the

PS/2 protocol.

Program ROM: 2 Kbytes of ROM store program machine

code in non-erasable memory. The code is copied to this

ROM during manufacture, from customer-supplied code.

Data RAM: 256 bytes of Data RAM enables run-time inter-

nal data storage, and includes an 8-level stack and 16

8-bit registers.

Timer/Counter: An internal 8-bit timer/counter can count

external events or pre-divided system clock pulses. An in-

ternal time-out interrupt may be generated by this device.

I/O Ports: Two 8-bit ports (Port 1 and Port 2) serve various

I/O functions. Some are for general purpose use, others

are utilized by the KBC firmware as shown in Figure 3-1.

PC87307 Datasheet(PDF) 43 Page - National Semiconductor (TI)

PC87307 Datasheet(HTML) 43 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL