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SC2200 Datasheet(PDF) 379 Page - National Semiconductor (TI) |
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SC2200 Datasheet(HTML) 379 Page - National Semiconductor (TI) |
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379 / 433 page ![]() Revision 3.0 379 www.national.com Electrical Specifications (Continued) 8.3.5 PCI Bus Interface The SC2200 is compliant with PCI Bus Rev. 2.1 specifications. Relevant information from the PCI Bus specifications is pro- vided below. All parameters in Table 8-17 are not 100% tested. The parameters in this table are further described in Figure 8-13. Figure 8-12. Testing Setup for Slew Rate and Minimum Timing Table 8-17. PCI AC Specifications Symbol Parameter Min Max Unit Comments IOH(AC) 1, 2 1. Refer to the V/I curves in Figure 8-13. This specification does not apply to PCICLK0, PCICLK1, and PCIRST# which are system outputs. 2. Maximum current requirements are met when drivers pull beyond the first step voltage. Equations which define these maximum values (A and B) are provided with relevant diagrams in Figure 8-13. These maximum values are guaranteed by design. Switching Current High -12VIO mA 0 < VOUT ≤ 0.3VIO -17.1(VIO-VOUT)mA 0.3VIO <VOUT <0.9VIO Equation A (Figure 8-13) 0.7VIO <VOUT <VIO Test Point2 -32VIO mA VOUT =0.7VIO IOL(AC) 1 Switching Current Low 16VIO mA VIO >VOUT ≥ 0.6VIO 26.7VOUT mA 0.6VIO >VOUT >0.1VIO 1 Equation B (Figure 8-13) 0.18VIO>VOUT>0 1 , 2 Test Point2 38VIO mA VOUT =0.18VIO ICL Low Clamp Current -25+(VIN+1)/0.015 mA -3 < VIN < -1 ICH High Clamp Current 25+(VIN-VIO-1)/0.015 mA VIO+4 > VIN >VIO+1 SLEWR 3 3. Rise slew rate does not apply to open-drain outputs. This parameter is interpreted as the cumulative edge rate across the specified range, according to the test circuit in Figure 8-12. Output Rise Slew Rate 1 4 V/ns 0.2VIO -0.6VIO Load SLEWF 3 Output Fall Slew Rate 1 4 V/ns 0.6VIO -0.2VIO Load Buffer VCC 0.5" max. Pin 1K Ω 1K Ω 10 pF Output |
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