SC2200 datasheet(431/433 Pages) NSC

431 / 433 page

Revision 3.0

431

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Support Documentation (Continued)

Table A-2. Edits to Current Revision

Section

Revision

General Description /

Features

• No changes.

Section 1.0 "Architec-

ture Overview"

• No changes.

Section 2.0 "Signal

Definitions"

• Table 2-2 "432-EBGA Ball Assignment - Sorted by Ball Number" on page 22:

— Added “(PU22.5)” notation to balls AJ10, AK10, AL10 and AJ11, LAD[3:0] functions.

• Table 2-4 "481-TEPBGA Ball Assignment - Sorted by Ball Number" on page 37:

— Added “(PU22.5)” notation to balls L29, L30, L31 and M28, LAD[3:0] functions.

• Table 2-7 "Two-Signal/Group Multiplexing" on page 52:

— The TEPBGA ball numbers for IDE_ADDR[2:0] and IDE_DATA[15:0] were wrong.

Fixed to match ball assignment..

• Section 2.4.8 "Low Pin Count (LPC) Bus Interface Signals" on page 67:

— LPCPD# - Added “/IRRX2” to GPIO38 in the Mux column.

• Section 2.4.12 "Parallel Port Interface Signals" on page 71:

— STB#WRITE - Added “+F_FRAME” to TFTD17 in the Mux column.

• Section 2.4.16 "GPIO Interface Signals" on page 75:

— Corrected Mux column for GPIO8 (had “+SDTEST5”, changed to “+SDTEST4”).

— The TEPBGA ball numbers for GPIO14 through GPIO19 were wrong. Fixed to match

ball assignment.

•

Section 3.0 "General

Configuration Block"

• Table 3-1 "General Configuration Block Register Summary" on page 80:

— Offset 30h[27] - Corrected TEPBGA ball number for F_AD6 (was A29, changed to

A20).

— Offset 30h[9] - Corrected muxing for INTC# and GPIO19 (i.e., setting for PMR[4] was

reversed).

— Offset 34h[0] - Changed description from Reserved to SDBE0 (Slave Disconnect

Boundary Enable).

Section 4.0 "SuperI/O

Module"

• Table 4-32 "ACB Registers" on page 135:

— Offset 05h - Changed values to binary: 00010002 (810) to 0001000b and 11111112

(12710) to 1111111b.

Section 5.0 "Core

Logic Module"

• Physical Region Descriptor Format on 177:

— Fixed table cross-reference in first paragraph (changed to Table 5-11).

• Table 5-23 "F3BAR0: XpressAUDIO Support Registers Summary" on page 193:

— Offset 24h - Changed Width column from “---” to “32”.

• Table 5-38 "F3BAR0+Memory Offset: XpressAUDIO Configuration Registers" on page

269:

— Offset 0Ch[16] - Changed last two sentences into one. Now reads, “This bit is set by

hardware when a codec command is written to the Codec Command register. It

remains set until the command has been sent to the codec.

• Table 5-27 "USB_BAR: USB Controller Registers Summary" on page 196:

— Offset 48h - Changed reset value of from 01000002h to 01000003h.

• Table 5-42 "USB_BAR+Memory Offset: USB Controller Registers" on page 291:

— Offset 48h - Changed reset value of from 01000002h to 01000003h.

Section 6.0 "Video

Processor Module"

• Figure 6-2 "NTSC 525 Lines, 60 Hz, Odd Field" on page 318:

— Changed VSYNC to VSYNC Start and VSYNC End.

• Figure 6-3 "NTSC 525 Lines, 60 Hz, Even Field" on page 318:

— Changed VSYNC to VSYNC Start and VSYNC End.

SC2200 Datasheet(PDF) 431 Page - National Semiconductor (TI)

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