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HT45F56 Datasheet(PDF) 55 Page - Holtek Semiconductor Inc |
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HT45F56 Datasheet(HTML) 55 Page - Holtek Semiconductor Inc |
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55 / 90 page  Rev. 1.11 54 April 11, 2017 Rev. 1.11 55 April 11, 2017 HT45F56 Shock Detector Flash MCU HT45F56 Shock Detector Flash MCU IntheCompareMatchOutputMode,theCTIO1andCTIO0bitsdeterminehowthe CTMoutputpinchangesstatewhenacomparematchoccursfromtheComparatorA. TheCTMoutputpincanbesetuptoswitchhigh,switchlowortotoggleitspresent statewhenacomparematchoccursfromtheComparatorA.Whenthebitsareboth zero,thennochangewilltakeplaceontheoutput.TheinitialvalueoftheCTMoutput pinshouldbesetupusingtheCTOCbitintheCTMC1register.Notethattheoutput levelrequestedbytheCTIO1andCTIO0bitsmustbedifferentfromtheinitialvalue setupusingtheCTOCbitotherwisenochangewilloccurontheCTMoutputpinwhen acomparematchoccurs.AftertheCTMoutputpinchangesstate,itcanberesettoits initiallevelbychangingtheleveloftheCTONbitfromlowtohigh. InthePWMMode,theCTIO1andCTIO0bitsdeterminehowtheCTMoutputpin changesstatewhenacertaincomparematchconditionoccurs.ThePWMoutput functionismodifiedbychangingthesetwobits.Itisnecessarytoonlychangethe valuesoftheCTIO1andCTIO0bitsonlyaftertheCTMhasbeenswitchedoff. UnpredictablePWMoutputswilloccuriftheCTIO1andCTIO0bitsarechanged whentheCTMisrunning. Bit3 CTOC:CTPOutputcontrol CompareMatchOutputMode 0:Initiallow 1:Initialhigh PWMOutputMode 0:Activelow 1:Activehigh ThisistheoutputcontrolbitfortheCTMoutputpin.Itsoperationdependsupon whetherCTMisbeingusedintheCompareMatchOutputModeorinthePWM Mode.IthasnoeffectiftheCTMisintheTimer/CounterMode.IntheCompare MatchOutputModeitdeterminesthelogicleveloftheCTMoutputpinbeforea comparematchoccurs.InthePWMModeitdeterminesifthePWMsignalisactive highoractivelow. Bit2 CTPOL:CTPOutputpolaritycontrol 0:Non-inverted 1:Inverted ThisbitcontrolsthepolarityoftheCTPoutputpin.WhenthebitissethightheCTM outputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasnoeffectifthe CTMisintheTimer/CounterMode. Bit1 CTDPX:CTMPWMduty/periodcontrol 0:CCRP–period;CCRA–duty 1:CCRP–duty;CCRA–period ThisbitdetermineswhichoftheCCRAandCCRPregistersareusedforperiodand dutycontrolofthePWMwaveform. Bit0 CTCCLR:CTMCounterClearconditionselection 0:CTMnComparatorPmatch 1:CTMnComparatorAmatch Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe CompactTMcontainstwocomparators,ComparatorAandComparatorP,eitherof whichcanbeselectedtocleartheinternalcounter.WiththeCTCCLRbitsethigh, thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA. Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom theComparatorPorwithacounteroverflow.Acounteroverflowclearingmethodcan onlybeimplementediftheCCRPbitsareallclearedtozero.TheCTCCLRbitisnot usedinthePWMMode. |
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