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CS43130 Datasheet(PDF) 117 Page - Cirrus Logic |
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CS43130 Datasheet(HTML) 117 Page - Cirrus Logic |
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117 / 137 page  DS1073F1 117 CS43130 7.6 Interrupt Status and Mask Registers 7.6.5 Interrupt Status 5 Address 0xF0004 R/O 76543210 DSD_STUCK_ INT DSD_INVAL_ A_INT DSD_INVAL_ B_INT DSD_ SILENCE_A_ INT DSD_ SILENCE_B_ INT DSD_RATE_ ERROR_INT DOP_MRK_ DET_INT DOP_ON_INT Default 00000000 Bits Name Description 7DSD_STUCK_ INT At least one DSD input channel is stuck at 0 or 1. 0 Condition is not present 1 Condition is present 6 DSD_INVAL_ A_INT Channel A input exceeds the max peak level of +3.1-dB SACD. 0 Condition is not present 1 Condition is present 5 DSD_INVAL_ B_INT Channel B input exceeds the max peak level of +3.1-dB SACD. 0 Condition is not present 1 Condition is present 4DSD_ SILENCE_A_ INT Channel A contains DSD silence pattern. 0 Condition is not present 1 Condition is present 3DSD_ SILENCE_B_ INT Channel B contains DSD silence pattern. 0 Condition is not present 1 Condition is present 2DSD_RATE_ ERROR_INT DSD data rate-related error is detected. The rate of the input DSD stream is not as described in DSD_SPEED setting. 0 Condition is not present 1 Condition is present 1DOP_MRK_ DET_INT A valid sequence of DoP markers has been detected. 0 Condition is not present 1 Condition is present 0DOP_ON_INT The DoP decoder is powered up. 0 Condition is not present 1 Condition is present 7.6.6 Interrupt Mask 1 Address 0xF0010 R/W 76543210 DAC_OVFL_ INT_MASK HPDETECT_ PLUG_INT_ MASK HPDETECT_ UNPLUG_INT_ MASK XTAL_READY_ INT_MASK XTAL_ ERROR_INT_ MASK PLL_READY_ INT_MASK PLL_ERROR_ INT_MASK PDN_DONE_ INT_MASK Default 11111111 Bits Name Description 7 DAC_OVFL_ INT_MASK DAC_OVFL_INT mask. 0 Unmasked 1 (Default) Masked 6 HPDETECT_ PLUG_INT_ MASK HP_DETECT_PLUG_INT mask. 0 Unmasked 1 (Default) Masked 5 HPDETECT_ UNPLUG_ INT_MASK HP_DETECT_UNPLUG_INT mask. 0 Unmasked 1 (Default) Masked 4XTAL_ READY_INT_ MASK XTAL_READY_INT mask. 0 Unmasked 1 (Default) Masked 3XTAL_ ERROR_INT_ MASK XTAL_ERROR_INT mask. 0 Unmasked 1 (Default) Masked 2 PLL_READY_ INT_MASK PLL_READY_INT mask. 0 Unmasked 1 (Default) Masked |
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