WM8235 datasheet(37/154 Pages) CIRRUS

37 / 154 page

WM8235

Rev 4.6

SENSOR TIMING GENERATION

WM8235 provide two types of clock internally. C_CK* are high speed clocks, these clocks can set the

clock phase by using fine pitch phase control. P_CK* are pixel rate signals which is selected by PO0

to PO7. WM8235 has eleven TG outputs pins. CLK1 is for clock type use only. CLK2, CLK3, CLK4,

CLK5 and CLK6 are selectable high speed type signal or pulse type signal. CLK7 and CLK8 are pulse

type use only.

CLK1

CLK2

CLK3

CLK4

CLK5

CLK6

C_CK1

C_CK2

C_CK3

C_CK4

C_CK5

C_CK6

CLK7

CLK8

P_CK2

P_CK3

P_CK4

P_CK5

P_CK6

P_CK7

P_CK8

delay

PO0

PO1

PO3

PO4

PO5

PO6

PO7

PO2

MCLK (input)

CK1,2,3,4,5,6

(Clock Output)

tMCLKD

CK_RISE[5:0]

CK_FALL[5:0]

VSMP (Internal)

TGCK (Internal)

Pixel Counter

(Internal)

2*tPER/60

tPER

CK2,3,4,5,6,7,8

(Pulse output)

TCLKO_RISE[5:0]

TGCO (Internal)

Duty=50%

DEL_PCK [1:0]

VSMP_RISE[5:0]

VSMP_FALL[5:0]

Figure 21 TG Output Timing

WM8235 Datasheet(PDF) 37 Page - Cirrus Logic

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