2

RT2702

www.richtek.com

DS2702-00 October 2016

©

Copyright 2016 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

Functional Pin Description

Pin No

Pin Name

Pin Function

1

MODE

Operation mode detection input.

2

PWM

Logic gate driver. This pin provides PWM signal for the gate drive.

3

DISB

External driver enable. Enable external driver when DISB is high, and disable

4

THWN

trip level.

5

CSP

Non-inverting input of current sense amplifier.

6

CSN

also discharged by this pin when system is shut down or any protection is

toggled. Resistance of the discharge switch is around 30

.

7

FB

Feedback pin. This pin is the negative input node of the PWM comparator.

8

RGND

Remote ground sense. This pin is intended to connect to the negative side of the

load for remote sensing.

9

SS

External soft-start pin. Achieve programmable soft-start time function, also have

a default internal soft-start time 3ms for minimum soft-start time. DO NOT force

this pin lower than 1.2V, otherwise soft-start procedure won't be finished. Refer

to “Application Information” for further description.

10

ILIM

11

POK

Open drain power good indicator. High impedance indicates power is good.

12

EN

Enable control input. The device enters its 20

A supply current shutdown mode

if EN is less than the EN input falling edge trip level and does not restart until EN

is greater than the EN input rising edge trip level. Connect EN to VIN for

automatically startup. EN can be connected to VIN through a resistive voltage

divider to implement a programmable under-voltage lockout.

13

TON

On-time/switching frequency adjustment input. Connect a resistor to VIN for

adjusting switching frequency. And connect an another 100pF ceramic capacitor

between TON and ground is optional for noise immunity enhancement.

14

VIN

Power supply input.

15

PHASE

through PHASE pin to on-time generation circuit.

16

VDRV

Output bypass for the 5V regulator. Connect a low-ESR bypass ceramic

capacitor of 4.7

F from this pin to GND.

17 (Exposed Pad) GND

Ground. The exposed pad must be soldered to a large PCB and connected to

GND for maximum thermal dissipation.