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OPA838IDBVT Datasheet(PDF) 35 Page - Texas Instruments |
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OPA838IDBVT Datasheet(HTML) 35 Page - Texas Instruments |
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35 / 41 page ![]() 35 OPA838 www.ti.com SBOS867 – AUGUST 2017 Product Folder Links: OPA838 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 10 Power Supply Recommendations and Thermal Notes The OPAx838 devices are intended to work in a supply range of 2.7 V to 5.4 V. Good power-supply bypassing is required. Minimize the distance (less than 0.1 inch) from the power-supply pins to high-frequency, 0.1-μF decoupling capacitors. A larger capacitor (2.2 µF is typical) is used with a high-frequency, 0.1-µF supply- decoupling capacitor at the device supply pins. For single-supply operation, only the positive supply has these capacitors. When a split-supply is used, use these capacitors for each supply to ground. If necessary, place the larger capacitors further from the device and share these capacitors among several devices in the same area of the PCB. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. An optional 0.1-µF supply decoupling capacitor across the two power supplies (for bipolar operation) reduces second harmonic distortion. The OPA838 has a positive supply current temperature coefficient as shown in Figure 57. This helps improve the input offset voltage drift. Supply current requirements in system design must account for this effect using the maximum intended ambient and Figure 57 to size the supply required. The very low power dissipation for the OPA838 typically does not require any special thermal design considerations. For the extreme case of 125°C operating ambient, use the approximate maximum 200°C/W for the three packages, and a maximum internal power of 5.4-V supply × 1.25-mA 125°C supply current from Figure 57 gives a maximum internal power of 6.75 mW. This only gives a 1.35°C rise from ambient to junction temperature which is well below the maximum 150°C junction temperature. Load power adds to this, but also increases the junction temperature only slightly over ambient temperature. 11 Layout 11.1 Layout Guidelines The OPA838 EVM can be used as a reference when designing the circuit board. TI recommends following the EVM layout of the external components near to the amplifier, ground plane construction, and power routing as closely as possible. General guidelines are listed below: 1. Signal routing must be direct and as short as possible into an out of the op amp. 2. The feedback path must be short and direct avoiding vias if possible. 3. Ground or power planes must be removed from directly under the negative input and output pins of the amplifier. 4. TI recommends placing a series output resistor as close to the output pin as possible when driving capacitive or matched loads. 5. A 2.2-µF power-supply decoupling capacitor must be placed within two inches of the device and can be shared with other op amps. For split!~- supply operation, a capacitor is required for both supplies. 6. A 0.1-µF power-supply decoupling capacitor must be placed as close to the supply pins as possible, preferably within 0.1 inch. For split-supply operation, a capacitor is required for both supplies. 7. The PD pin uses logic levels referenced off the negative supply. If the pin is not used, the pin must tie to the positive supply to enable the amplifier. If the pin is used, the pin must be actively driven. A bypass capacitor is not necessary, but is used for EMI rejection in noisy environments. |
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