| Electronic Components Datasheet Search |
|
ADV7174BCP Datasheet(PDF) 22 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADV7174BCP Datasheet(HTML) 22 Page - Analog Devices |
|
22 / 52 page ![]() ADV7174/ADV7179 Rev. A | Page 22 of 52 Mode 2: Slave Option HSYNC, VSYNC, BLANK (Timing Register 0 TR0 = X X X X X 1 0 0) In this mode, the ADV7174/ADV7179 accepts horizontal and vertical SYNC signals. A coincident low transition of both and VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an even field. The BLANK signal is optional. When the BLANK input is disabled, the ADV7174/ADV7179 automatically blanks all normally blank lines as per CCIR-624. Mode 2 is illustrated in Figure 27 (NTSC) and Figure 28 (PAL). 522 523 524 525 1 2 3 4 5 6 7 8 9 10 11 20 21 22 DISPLAY DISPLAY ODD FIELD EVEN FIELD HSYNC BLANK VSYNC 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 283 284 285 ODD FIELD EVEN FIELD DISPLAY DISPLAY HSYNC BLANK VSYNC VERTICAL BLANK VERTICAL BLANK Figure 27. Timing Mode 2 (NTSC) 622 623 624 625 1 2 3 4 5 6 7 21 22 23 DISPLAY ODD FIELD EVEN FIELD HSYNC BLANK VSYNC DISPLAY 309 310 311 312 313 314 315 316 317 318 319 334 335 336 DISPLAY ODD FIELD EVEN FIELD HSYNC BLANK DISPLAY 320 VSYNC VERTICAL BLANK VERTICAL BLANK Figure 28. Timing Mode 2 (PAL) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |