ADV7174BCP datasheet(31/52 Pages) AD

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ADV7174/ADV7179

Rev. A | Page 31 of 52

MODE REGISTER 3 (MR3)

Bits:

MR37–MR30

Address:

SR4–SR0 = 03H

Mode Register 3 is an 8-bit-wide register. Figure 41 shows the various operations under the control of Mode Register 3.

MR31

MR30

MR37

MR32

MR34

MR33

MR35

MR36

MR30

MR31

RESERVED

VBI_OPEN

DISABLE

ENABLE

MR32

DAC OUTPUT

COMPOSITE

GREEN/LUMA/Y

MR33

DAC A

BLUE/COMP/Pb

DAC B

RED/CHROMA/Pr

DAC C

CHROMA OUTPUT

SELECT

DISABLE

ENABLE

MR34

TELETEXT

ENABLE

DISABLE

ENABLE

MR35

TTXREQ BIT

MODE CONTROL

NORMAL

BIT REQUEST

MR36

INPUT DEFAULT

COLOR

DISABLE

ENABLE

MR37

Figure 41. Mode Register 3

Table 12. MR3 Bit Description

Bit Name

Bit No.

Description

Revision Code

MR30–MR31

These bits are read-only and indicate the revision of the device.

VBI Open

MR32

This bit determines whether or not data in the vertical blanking interval (VBI) is output to

the analog outputs or blanked. VBI data insertion is not available in Slave Mode 0. Also,

when both BLANK input control and VBI open are enabled, BLANK input control has

priority, i.e., VBI data insertion will not work.

DAC Output

MR33

This bit is used to switch the DAC outputs from SCART to a EUROSCART configuration. A

complete list of all DAC output configurations is shown in Table 13.

Chroma Output Select

MR34

With this active high bit it is possible to output an extra chrominance signal C, on DAC A

in any configuration that features a CVBS signal.

Teletext Enable

MR35

This bit must be set to 1 to enable Teletext data insertion on the TTX pin.

TTXREQ Bit Mode Control

MR36

This bit enables switching of the Teletext request signal from a continuous high signal

(MR36 = 0) to a bitwise request signal (MR36 = 1).

Input Default Color

MR37

This bit determines the default output color from the DACs for zero input pixel data (or

disconnected). A Logic 0 means that the color corresponding to 00000000 is displayed. A

Logic 1 forces the output color to black for 00000000 pixel input video data.

Table 13. DAC Output Configuration Matrix

MR34

MR40

MR41

MR33

DAC A

DAC B

DAC C

CVBS

CVBS: Composite Video Baseband Signal

Y: Luminance Component Signal (For YPbPr or Y/C Mode)

C: Chrominance Signal (For Y/C Mode)

Pb: ColorComponent Signal (For YPbPr Mode)

Pr: Color Component Signal (For YPbPr Mode)

R: RED Component Video (For RGB Mode)

G: GREEN Component Video (For RGB Mode)

B: BLUE Component Video (For RGB Mode)

Each DAC can be powered on or off individually

See MR1 Description and Figure 39.

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