ADV7174BCP datasheet(26/52 Pages) AD

26 / 52 page

ADV7174/ADV7179

Rev. A | Page 26 of 52

Stop and start conditions can be detected at any stage during the

data transfer. If these conditions are asserted out of sequence with

normal read and write operations, they cause an immediate

jump to the idle condition. During a given SCLOCK high period,

the user should issue only one start condition, one stop condition,

or a single stop condition followed by a single start condition. If

an invalid subaddress is issued by the user, the ADV7174/

ADV7179 cannot issue an acknowledge and returns to the idle

condition. If in auto-increment mode the user exceeds the

highest subaddress, the following action is taken:

In read mode, the highest subaddress register contents

continues to be output until the master device issues a no-

acknowledge. This indicates the end of a read. A no-

acknowledge condition is when the SDATA line is not

pulled low on the ninth pulse.

In write mode, the data for the invalid byte is not loaded

into any subaddress register, a no-acknowledge is issued by

the ADV7174/ADV7179, and the part returns to the idle

condition.

Figure 35 illustrates an example of data transfer for a read

sequence and the start and stop conditions.

Figure 36 shows bus write and read sequences.

1–7

START ADDR R/W ACK SUBADDRESS ACK

DATA

ACK

STOP

SDATA

SCLOCK

Figure 35. Bus Data Transfer

The MPU can write to or read from all of the ADV7174/

ADV7179 registers except the subaddress register, which is a

write-only register. The subaddress register determines which

nications with the part through the bus start with an access to

the subaddress register. A read/write operation is performed

from to the target address, which then increments to the next

address until a stop command on the bus is performed.

DATA

A(S)

SLAVE ADDR A(S)

SUB ADDR

A(S)

LSB = 0

LSB = 1

DATA

SLAVE ADDR A(S)

SUB ADDR

A(S) S

SLAVE ADDR

A(S)

DATA

A(M)

DATA

WRITE

SEQUENCE

READ

SEQUENCE

A(S) = NO-ACKNOWLEDGE BY SLAVE

A(M) = NO-ACKNOWLEDGE BY MASTER

A(S) = ACKNOWLEDGE BY SLAVE

A(M) = ACKNOWLEDGE BY MASTER

S = START BIT

P = STOP BIT

A(S)

A(M)

Figure 36. Write and Read Sequences

ADV7174BCP Datasheet(PDF) 26 Page - Analog Devices

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